Section 2 - CPU Registers

Introduction

This section will cover the programmable CPU registers. The Assembly language programmer must be familiar with the references and uses of each register in order to program effectively. Other registers are discussed in the section on different 80X86 processors.

The following is a list of the 16-bit registers and their references:

Some registers can be divided and accessed as two eight-bit registers for byte operations. They are referenced as follows:

AX and AL are the Accumulator

AX = AH+AL. AX is the 16-bit reference for the accumulator; AL is the 8-bit reference. AL is the low half of AX with AH as the high half. The accumulator is the primary data register. Most instructions for handling data execute faster if the data is in the accumulator.

FL Flag Register

The Flag register is a 16-bit data register used to keep track of CPU activity. This includes all logical, arithmetic, and comparing results as well as interrupt controls, debug tracing, string direction flags, etc.
Most conditional jumping instructions use the contents of this register to determine if branch conditions are true or not true.

Flag Bits X|X|X|X|OF|DF|IF|TF|SF|ZF|X|AF|X|PF|X|CF

The bit positions with X are not defined for the 8086/8088 CPU but are reserved by Intel for use with other processors in the series.

OF Overflow Flag

This bit is set if the last data manipulation caused the high bit to change.

DF Direction Flag

This bit is used by the CPU to decide the direction of string operations. Clearing the bit causes string operations to go forward and setting the bit causes string operations to go backward.

IF Interrupt Flag

This bit can be set or cleared by the programmer to prevent or allow maskable interrupts to occur.

TF Trace Flag

This bit is used in the debugging mode for single stepping through program logic.

SF Sign Flag

This bit is reset by logical operations to be equal to the high bit of the resulting data.

ZF Zero Flag

This bit is set if the last data manipulation produced a zero condition.

AF Aux Carry Flag

This bit is used by logical instructions that deal with data in nibbles (four bit).

PF Parity Flag

This bit is reset by the last data manipulation instruction to reflect if the operation produced an even or odd parity condition. A 1 means even parity and a 0 means odd parity.

CF Carry Flag

When adding, the carry bit is set if an overflow occurs. If subtracting, the bit is set if it had to borrow a bit because the subtraction resulted in a sign flip.

BX Base Index

BX is the most flexible of the indexing registers. It is a 16-bit register that can also be addressed in 8-bit format as BH (high) and BL (low) where BX = BH+BL. BX may beadded to other index registers for working with morecomplex indexing offsets. Examples: [BX+offset], [BX+SI+offset], [BX+DI+offset]

BP Base Pointer

BP is the base pointer register used to index data in the stack area. This register is used by many compilers to index data frames in the stack area. BP may be combined with DI or SI to index data in the stack area. Examples: [BP+SI+offset], [BP+DI+offset]

SI Source Index

SI is the source index register used by the string instructions. It may be combined with BX or BP to index data. Example: [SI+BX+offset]

DI Destination Index

DI is the destination index register used by the string instructions. It may be combined with BX or BP to index data. Example: [DI+BX+offset]

SP Stack Pointer

SP is the stack pointing register used by the push, pop, call, interrupt, and return instructions. It always indexes the last word pushed onto the stack.

CX Counter

CX is the counter register used by the string, repeat, and loop instructions.

DX Data Register, I/O index

DX is the data register. DX is only used as an index for I/O port functions. It is used for the 16 by 16 bit multiply and the 32 by 16 bit divide instructions. The results from a 16 bit multiply are put into DX:AX where DX holds the high 16 bits and AX holds the low 16 bits. For a 32 bit by 16 bit divide, DX will hold the leftover (modulo) data resulting from the divide.

IP Instruction Pointer

IP is used to index the next instruction to execute. It is reset by call and jump instructions.

SEGMENT ADDRESSING REGISTERS

The 8086 CPU divides its memory addressing into four areas. The four areas are code, stack, data, and extra data. The current location of these sections is controlled by four segment addressing registers. The 8086 architecture uses these to expand the addressing range of the CPU. The basic addressing range of a normal 16 bit CPU is 65536 bytes. By adding segmented memory offsets into the memory addressing hardware, the addressing range of the 8086 CPU is increased to 20 bits or 1,048,576 bytes. This is done by shifting the four 16 bit segment registers over a nibble (four bits) and adding them to the other index registers to complete the 20 bit real address. With this system, the CPU can address one megabyte of memory. The only complexity to the memory system is that it is divided into four blocks that have a maximum of 64KB each. This limits the active addressing range of the CPU to 256KB maximum at one time. Because there are two 16 bit words used to complete an address, this book uses “offset” to refer to the address in the lower 16 bit range (0 - 65535). References to the segment address part, which is the upper 16 bit word, use “SEG” or “segment.”

CS Code Segment

This is used with the IP (instruction pointer) register to index the next instruction for program logic execution.
How the CPU calculates a code address with the instruction pointer:

 IP                       |X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|
+CS               |X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|
=real address     |X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|X|

If IP=7 and CS=3 then real address=37H as shown:

 IP                       |0|0|0|0|0|0|0|0|0|0|0|0|0|1|1|1|
+CS               |0|0|0|0|0|0|0|0|0|0|0|0|0|0|1|1|
=real address     |0|0|0|0|0|0|0|0|0|0|0|0|0|0|1|1|0|1|1|1|

This is used as the extra data area. It is indexed by DI during the execution of string instructions as the destination address.

Overrides can be used with most instructions to force an index register to reference data with a different segment register than what is normally used. For example, data indexed by BX normally comes from the DS segment, but with an override, data can come from the CS segment as CS:[BX].