Using as

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Using as

This file is a user guide to the gnu assembler as (GNU Binutils) version 2.17.90.

This document is distributed under the terms of the GNU Free Documentation License. A copy of the license is included in the section entitled “GNU Free Documentation License”.


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1 Overview

Here is a brief summary of how to invoke as. For details, see Command-Line Options.

     
     as [-a[cdhlns][=file]] [--alternate] [-D]
      [--debug-prefix-map old=new]
      [--defsym sym=val] [-f] [-g] [--gstabs]
      [--gstabs+] [--gdwarf-2] [--help] [-I dir] [-J]
      [-K] [-L] [--listing-lhs-width=NUM]
      [--listing-lhs-width2=NUM] [--listing-rhs-width=NUM]
      [--listing-cont-lines=NUM] [--keep-locals] [-o
      objfile] [-R] [--reduce-memory-overheads] [--statistics]
      [-v] [-version] [--version] [-W] [--warn]
      [--fatal-warnings] [-w] [-x] [-Z] [@FILE]
      [--target-help] [target-options]
      [--|files ...]
     
     
     
     Target Alpha options:
        [-mcpu]
        [-mdebug | -no-mdebug]
        [-relax] [-g] [-Gsize]
        [-F] [-32addr]
     
     Target ARC options:
        [-marc[5|6|7|8]]
        [-EB|-EL]
     
     Target ARM options:
     
        [-mcpu=processor[+extension...]]
        [-march=architecture[+extension...]]
        [-mfpu=floating-point-format]
        [-mfloat-abi=abi]
        [-meabi=ver]
        [-mthumb]
        [-EB|-EL]
        [-mapcs-32|-mapcs-26|-mapcs-float|
         -mapcs-reentrant]
        [-mthumb-interwork] [-k]
     
     Target CRIS options:
        [--underscore | --no-underscore]
        [--pic] [-N]
        [--emulation=criself | --emulation=crisaout]
        [--march=v0_v10 | --march=v10 | --march=v32 | --march=common_v10_v32]
     
     
     
     Target D10V options:
        [-O]
     
     Target D30V options:
        [-O|-n|-N]
     
     
     
     Target i386 options:
        [--32|--64] [-n]
        [-march=CPU] [-mtune=CPU]
     
     Target i960 options:
     
        [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB|
         -AKC|-AMC]
        [-b] [-no-relax]
     
     Target IA-64 options:
        [-mconstant-gp|-mauto-pic]
        [-milp32|-milp64|-mlp64|-mp64]
        [-mle|mbe]
        [-mtune=itanium1|-mtune=itanium2]
        [-munwind-check=warning|-munwind-check=error]
        [-mhint.b=ok|-mhint.b=warning|-mhint.b=error]
        [-x|-xexplicit] [-xauto] [-xdebug]
     
     Target IP2K options:
        [-mip2022|-mip2022ext]
     
     Target M32C options:
        [-m32c|-m16c]
     
     Target M32R options:
        [--m32rx|--[no-]warn-explicit-parallel-conflicts|
        --W[n]p]
     
     Target M680X0 options:
        [-l] [-m68000|-m68010|-m68020|...]
     
     Target M68HC11 options:
        [-m68hc11|-m68hc12|-m68hcs12]
        [-mshort|-mlong]
        [-mshort-double|-mlong-double]
        [--force-long-branches] [--short-branches]
        [--strict-direct-mode] [--print-insn-syntax]
        [--print-opcodes] [--generate-example]
     
     Target MCORE options:
        [-jsri2bsr] [-sifilter] [-relax]
        [-mcpu=[210|340]]
     
     Target MIPS options:
        [-nocpp] [-EL] [-EB] [-O[optimization level]]
        [-g[debug level]] [-G num] [-KPIC] [-call_shared]
        [-non_shared] [-xgot [-mvxworks-pic]
        [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32]
        [-march=CPU] [-mtune=CPU] [-mips1] [-mips2]
        [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2]
        [-mips64] [-mips64r2]
        [-construct-floats] [-no-construct-floats]
        [-trap] [-no-break] [-break] [-no-trap]
        [-mfix7000] [-mno-fix7000]
        [-mips16] [-no-mips16]
        [-msmartmips] [-mno-smartmips]
        [-mips3d] [-no-mips3d]
        [-mdmx] [-no-mdmx]
        [-mdsp] [-mno-dsp]
        [-mdspr2] [-mno-dspr2]
        [-mmt] [-mno-mt]
        [-mdebug] [-no-mdebug]
        [-mpdr] [-mno-pdr]
     
     Target MMIX options:
        [--fixed-special-register-names] [--globalize-symbols]
        [--gnu-syntax] [--relax] [--no-predefined-symbols]
        [--no-expand] [--no-merge-gregs] [-x]
        [--linker-allocated-gregs]
     
     Target PDP11 options:
        [-mpic|-mno-pic] [-mall] [-mno-extensions]
        [-mextension|-mno-extension]
        [-mcpu] [-mmachine]
     
     Target picoJava options:
        [-mb|-me]
     
     Target PowerPC options:
        [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|
         -m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke|
         -mbooke32|-mbooke64]
        [-mcom|-many|-maltivec] [-memb]
        [-mregnames|-mno-regnames]
        [-mrelocatable|-mrelocatable-lib]
        [-mlittle|-mlittle-endian|-mbig|-mbig-endian]
        [-msolaris|-mno-solaris]
     
     Target SPARC options:
     
        [-Av6|-Av7|-Av8|-Asparclet|-Asparclite
         -Av8plus|-Av8plusa|-Av9|-Av9a]
        [-xarch=v8plus|-xarch=v8plusa] [-bump]
        [-32|-64]
     
     Target TIC54X options:
      [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf]
      [-merrors-to-file <filename>|-me <filename>]
     
     
     Target Z80 options:
       [-z80] [-r800]
       [ -ignore-undocumented-instructions] [-Wnud]
       [ -ignore-unportable-instructions] [-Wnup]
       [ -warn-undocumented-instructions] [-Wud]
       [ -warn-unportable-instructions] [-Wup]
       [ -forbid-undocumented-instructions] [-Fud]
       [ -forbid-unportable-instructions] [-Fup]
     
     
     
     Target Xtensa options:
      [--[no-]text-section-literals] [--[no-]absolute-literals]
      [--[no-]target-align] [--[no-]longcalls]
      [--[no-]transform]
      [--rename-section oldname=newname]
     
@file
Read command-line options from file. The options read are inserted in place of the original @file option. If file does not exist, or cannot be read, then the option will be treated literally, and not removed.

Options in file are separated by whitespace. A whitespace character may be included in an option by surrounding the entire option in either single or double quotes. Any character (including a backslash) may be included by prefixing the character to be included with a backslash. The file may itself contain additional @file options; any such options will be processed recursively.

-a[cdhlmns]
Turn on listings, in any of a variety of ways:
-ac
omit false conditionals
-ad
omit debugging directives
-ah
include high-level source
-al
include assembly
-am
include macro expansions
-an
omit forms processing
-as
include symbols
=file
set the name of the listing file

You may combine these options; for example, use -aln for assembly listing without forms processing. The =file option, if used, must be the last one. By itself, -a defaults to -ahls.

--alternate
Begin in alternate macro mode. See .altmacro.
-D
Ignored. This option is accepted for script compatibility with calls to other assemblers.
--debug-prefix-map old=new
When assembling files in directory old, record debugging information describing them as in new instead.
--defsym sym=value
Define the symbol sym to be value before assembling the input file. value must be an integer constant. As in C, a leading 0x indicates a hexadecimal value, and a leading 0 indicates an octal value. The value of the symbol can be overridden inside a source file via the use of a .set pseudo-op.
-f
“fast”—skip whitespace and comment preprocessing (assume source is compiler output).
-g
--gen-debug
Generate debugging information for each assembler source line using whichever debug format is preferred by the target. This currently means either STABS, ECOFF or DWARF2.
--gstabs
Generate stabs debugging information for each assembler line. This may help debugging assembler code, if the debugger can handle it.
--gstabs+
Generate stabs debugging information for each assembler line, with GNU extensions that probably only gdb can handle, and that could make other debuggers crash or refuse to read your program. This may help debugging assembler code. Currently the only GNU extension is the location of the current working directory at assembling time.
--gdwarf-2
Generate DWARF2 debugging information for each assembler line. This may help debugging assembler code, if the debugger can handle it. Note—this option is only supported by some targets, not all of them.
--help
Print a summary of the command line options and exit.
--target-help
Print a summary of all target specific options and exit.
-I dir
Add directory dir to the search list for .include directives.
-J
Don't warn about signed overflow.
-K
Issue warnings when difference tables altered for long displacements.
-L
--keep-locals
Keep (in the symbol table) local symbols. These symbols start with system-specific local label prefixes, typically .L for ELF systems or L for traditional a.out systems. See Symbol Names.
--listing-lhs-width=number
Set the maximum width, in words, of the output data column for an assembler listing to number.
--listing-lhs-width2=number
Set the maximum width, in words, of the output data column for continuation lines in an assembler listing to number.
--listing-rhs-width=number
Set the maximum width of an input source line, as displayed in a listing, to number bytes.
--listing-cont-lines=number
Set the maximum number of lines printed in a listing for a single line of input to number + 1.
-o objfile
Name the object-file output from as objfile.
-R
Fold the data section into the text section.

Set the default size of GAS's hash tables to a prime number close to number. Increasing this value can reduce the length of time it takes the assembler to perform its tasks, at the expense of increasing the assembler's memory requirements. Similarly reducing this value can reduce the memory requirements at the expense of speed.

--reduce-memory-overheads
This option reduces GAS's memory requirements, at the expense of making the assembly processes slower. Currently this switch is a synonym for --hash-size=4051, but in the future it may have other effects as well.
--statistics
Print the maximum space (in bytes) and total time (in seconds) used by assembly.
--strip-local-absolute
Remove local absolute symbols from the outgoing symbol table.
-v
-version
Print the as version.
--version
Print the as version and exit.
-W
--no-warn
Suppress warning messages.
--fatal-warnings
Treat warnings as errors.
--warn
Don't suppress warning messages or treat them as errors.
-w
Ignored.
-x
Ignored.
-Z
Generate an object file even after errors.
-- | files ...
Standard input, or source files to assemble.

The following options are available when as is configured for an ARC processor.

-marc[5|6|7|8]
This option selects the core processor variant.
-EB | -EL
Select either big-endian (-EB) or little-endian (-EL) output.

The following options are available when as is configured for the ARM processor family.

-mcpu=processor[+extension...]
Specify which ARM processor variant is the target.
-march=architecture[+extension...]
Specify which ARM architecture variant is used by the target.
-mfpu=floating-point-format
Select which Floating Point architecture is the target.
-mfloat-abi=abi
Select which floating point ABI is in use.
-mthumb
Enable Thumb only instruction decoding.
-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant
Select which procedure calling convention is in use.
-EB | -EL
Select either big-endian (-EB) or little-endian (-EL) output.
-mthumb-interwork
Specify that the code has been generated with interworking between Thumb and ARM code in mind.
-k
Specify that PIC code has been generated.

See the info pages for documentation of the CRIS-specific options.

The following options are available when as is configured for a D10V processor.

-O
Optimize output by parallelizing instructions.

The following options are available when as is configured for a D30V processor.

-O
Optimize output by parallelizing instructions.


-n
Warn when nops are generated.


-N
Warn when a nop after a 32-bit multiply instruction is generated.

The following options are available when as is configured for the Intel 80960 processor.

-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
Specify which variant of the 960 architecture is the target.
-b
Add code to collect statistics about branches taken.
-no-relax
Do not alter compare-and-branch instructions for long displacements; error if necessary.

The following options are available when as is configured for the Ubicom IP2K series.

-mip2022ext
Specifies that the extended IP2022 instructions are allowed.
-mip2022
Restores the default behaviour, which restricts the permitted instructions to just the basic IP2022 ones.

The following options are available when as is configured for the Renesas M32C and M16C processors.

-m32c
Assemble M32C instructions.
-m16c
Assemble M16C instructions (the default).

The following options are available when as is configured for the Renesas M32R (formerly Mitsubishi M32R) series.

--m32rx
Specify which processor in the M32R family is the target. The default is normally the M32R, but this option changes it to the M32RX.
--warn-explicit-parallel-conflicts or --Wp
Produce warning messages when questionable parallel constructs are encountered.
--no-warn-explicit-parallel-conflicts or --Wnp
Do not produce warning messages when questionable parallel constructs are encountered.

The following options are available when as is configured for the Motorola 68000 series.

-l
Shorten references to undefined symbols, to one word instead of two.
-m68000 | -m68008 | -m68010 | -m68020 | -m68030
| -m68040 | -m68060 | -m68302 | -m68331 | -m68332
| -m68333 | -m68340 | -mcpu32 | -m5200
Specify what processor in the 68000 family is the target. The default is normally the 68020, but this can be changed at configuration time.
-m68881 | -m68882 | -mno-68881 | -mno-68882
The target machine does (or does not) have a floating-point coprocessor. The default is to assume a coprocessor for 68020, 68030, and cpu32. Although the basic 68000 is not compatible with the 68881, a combination of the two can be specified, since it's possible to do emulation of the coprocessor instructions with the main processor.
-m68851 | -mno-68851
The target machine does (or does not) have a memory-management unit coprocessor. The default is to assume an MMU for 68020 and up.

For details about the PDP-11 machine dependent features options, see PDP-11-Options.

-mpic | -mno-pic
Generate position-independent (or position-dependent) code. The default is -mpic.
-mall
-mall-extensions
Enable all instruction set extensions. This is the default.
-mno-extensions
Disable all instruction set extensions.
-mextension | -mno-extension
Enable (or disable) a particular instruction set extension.
-mcpu
Enable the instruction set extensions supported by a particular CPU, and disable all other extensions.
-mmachine
Enable the instruction set extensions supported by a particular machine model, and disable all other extensions.

The following options are available when as is configured for a picoJava processor.

-mb
Generate “big endian” format output.


-ml
Generate “little endian” format output.

The following options are available when as is configured for the Motorola 68HC11 or 68HC12 series.

-m68hc11 | -m68hc12 | -m68hcs12
Specify what processor is the target. The default is defined by the configuration option when building the assembler.
-mshort
Specify to use the 16-bit integer ABI.
-mlong
Specify to use the 32-bit integer ABI.
-mshort-double
Specify to use the 32-bit double ABI.
-mlong-double
Specify to use the 64-bit double ABI.
--force-long-branches
Relative branches are turned into absolute ones. This concerns conditional branches, unconditional branches and branches to a sub routine.
-S | --short-branches
Do not turn relative branches into absolute ones when the offset is out of range.
--strict-direct-mode
Do not turn the direct addressing mode into extended addressing mode when the instruction does not support direct addressing mode.
--print-insn-syntax
Print the syntax of instruction in case of error.
--print-opcodes
print the list of instructions with syntax and then exit.
--generate-example
print an example of instruction for each possible instruction and then exit. This option is only useful for testing as.

The following options are available when as is configured for the SPARC architecture:

-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite
-Av8plus | -Av8plusa | -Av9 | -Av9a
Explicitly select a variant of the SPARC architecture.

-Av8plus and -Av8plusa select a 32 bit environment. -Av9 and -Av9a select a 64 bit environment.

-Av8plusa and -Av9a enable the SPARC V9 instruction set with UltraSPARC extensions.

-xarch=v8plus | -xarch=v8plusa
For compatibility with the Solaris v9 assembler. These options are equivalent to -Av8plus and -Av8plusa, respectively.
-bump
Warn when the assembler switches to another architecture.

The following options are available when as is configured for the 'c54x architecture.

-mfar-mode
Enable extended addressing mode. All addresses and relocations will assume extended addressing (usually 23 bits).
-mcpu=CPU_VERSION
Sets the CPU version being compiled for.
-merrors-to-file FILENAME
Redirect error output to a file, for broken systems which don't support such behaviour in the shell.

The following options are available when as is configured for a mips processor.

-G num
This option sets the largest size of an object that can be referenced implicitly with the gp register. It is only accepted for targets that use ECOFF format, such as a DECstation running Ultrix. The default value is 8.


-EB
Generate “big endian” format output.


-EL
Generate “little endian” format output.


-mips1
-mips2
-mips3
-mips4
-mips5
-mips32
-mips32r2
-mips64
-mips64r2
Generate code for a particular mips Instruction Set Architecture level. -mips1 is an alias for -march=r3000, -mips2 is an alias for -march=r6000, -mips3 is an alias for -march=r4000 and -mips4 is an alias for -march=r8000. -mips5, -mips32, -mips32r2, -mips64, and -mips64r2 correspond to generic MIPS V, MIPS32, MIPS32 Release 2, MIPS64, and MIPS64 Release 2 ISA processors, respectively.
-march=CPU
Generate code for a particular mips cpu.
-mtune=cpu
Schedule and tune for a particular mips cpu.
-mfix7000
-mno-fix7000
Cause nops to be inserted if the read of the destination register of an mfhi or mflo instruction occurs in the following two instructions.
-mdebug
-no-mdebug
Cause stabs-style debugging output to go into an ECOFF-style .mdebug section instead of the standard ELF .stabs sections.
-mpdr
-mno-pdr
Control generation of .pdr sections.
-mgp32
-mfp32
The register sizes are normally inferred from the ISA and ABI, but these flags force a certain group of registers to be treated as 32 bits wide at all times. -mgp32 controls the size of general-purpose registers and -mfp32 controls the size of floating-point registers.
-mips16
-no-mips16
Generate code for the MIPS 16 processor. This is equivalent to putting .set mips16 at the start of the assembly file. -no-mips16 turns off this option.
-msmartmips
-mno-smartmips
Enables the SmartMIPS extension to the MIPS32 instruction set. This is equivalent to putting .set smartmips at the start of the assembly file. -mno-smartmips turns off this option.
-mips3d
-no-mips3d
Generate code for the MIPS-3D Application Specific Extension. This tells the assembler to accept MIPS-3D instructions. -no-mips3d turns off this option.
-mdmx
-no-mdmx
Generate code for the MDMX Application Specific Extension. This tells the assembler to accept MDMX instructions. -no-mdmx turns off this option.
-mdsp
-mno-dsp
Generate code for the DSP Release 1 Application Specific Extension. This tells the assembler to accept DSP Release 1 instructions. -mno-dsp turns off this option.
-mdspr2
-mno-dspr2
Generate code for the DSP Release 2 Application Specific Extension. This option implies -mdsp. This tells the assembler to accept DSP Release 2 instructions. -mno-dspr2 turns off this option.
-mmt
-mno-mt
Generate code for the MT Application Specific Extension. This tells the assembler to accept MT instructions. -mno-mt turns off this option.
--construct-floats
--no-construct-floats
The --no-construct-floats option disables the construction of double width floating point constants by loading the two halves of the value into the two single width floating point registers that make up the double width register. By default --construct-floats is selected, allowing construction of these floating point constants.


--emulation=name
This option causes as to emulate as configured for some other target, in all respects, including output format (choosing between ELF and ECOFF only), handling of pseudo-opcodes which may generate debugging information or store symbol table information, and default endianness. The available configuration names are: mipsecoff, mipself, mipslecoff, mipsbecoff, mipslelf, mipsbelf. The first two do not alter the default endianness from that of the primary target for which the assembler was configured; the others change the default to little- or big-endian as indicated by the b or l in the name. Using -EB or -EL will override the endianness selection in any case.

This option is currently supported only when the primary target as is configured for is a mips ELF or ECOFF target. Furthermore, the primary target or others specified with --enable-targets=... at configuration time must include support for the other format, if both are to be available. For example, the Irix 5 configuration includes support for both.

Eventually, this option will support more configurations, with more fine-grained control over the assembler's behavior, and will be supported for more processors.

-nocpp
as ignores this option. It is accepted for compatibility with the native tools.
--trap
--no-trap
--break
--no-break
Control how to deal with multiplication overflow and division by zero. --trap or --no-break (which are synonyms) take a trap exception (and only work for Instruction Set Architecture level 2 and higher); --break or --no-trap (also synonyms, and the default) take a break exception.
-n
When this option is used, as will issue a warning every time it generates a nop instruction from a macro.

The following options are available when as is configured for an MCore processor.

-jsri2bsr
-nojsri2bsr
Enable or disable the JSRI to BSR transformation. By default this is enabled. The command line option -nojsri2bsr can be used to disable it.
-sifilter
-nosifilter
Enable or disable the silicon filter behaviour. By default this is disabled. The default can be overridden by the -sifilter command line option.
-relax
Alter jump instructions for long displacements.
-mcpu=[210|340]
Select the cpu type on the target hardware. This controls which instructions can be assembled.
-EB
Assemble for a big endian target.
-EL
Assemble for a little endian target.

See the info pages for documentation of the MMIX-specific options.

The following options are available when as is configured for an Xtensa processor.

--text-section-literals | --no-text-section-literals
With --text-section-literals, literal pools are interspersed in the text section. The default is --no-text-section-literals, which places literals in a separate section in the output file. These options only affect literals referenced via PC-relative L32R instructions; literals for absolute mode L32R instructions are handled separately.
--absolute-literals | --no-absolute-literals
Indicate to the assembler whether L32R instructions use absolute or PC-relative addressing. The default is to assume absolute addressing if the Xtensa processor includes the absolute L32R addressing option. Otherwise, only the PC-relative L32R mode can be used.
--target-align | --no-target-align
Enable or disable automatic alignment to reduce branch penalties at the expense of some code density. The default is --target-align.
--longcalls | --no-longcalls
Enable or disable transformation of call instructions to allow calls across a greater range of addresses. The default is --no-longcalls.
--transform | --no-transform
Enable or disable all assembler transformations of Xtensa instructions. The default is --transform; --no-transform should be used only in the rare cases when the instructions must be exactly as specified in the assembly source.

The following options are available when as is configured for a Z80 family processor.

-z80
Assemble for Z80 processor.
-r800
Assemble for R800 processor.
-ignore-undocumented-instructions
-Wnud
Assemble undocumented Z80 instructions that also work on R800 without warning.
-ignore-unportable-instructions
-Wnup
Assemble all undocumented Z80 instructions without warning.
-warn-undocumented-instructions
-Wud
Issue a warning for undocumented Z80 instructions that also work on R800.
-warn-unportable-instructions
-Wup
Issue a warning for undocumented Z80 instructions that do not work on R800.
-forbid-undocumented-instructions
-Fud
Treat all undocumented instructions as errors.
-forbid-unportable-instructions
-Fup
Treat undocumented Z80 instructions that do not work on R800 as errors.


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1.1 Structure of this Manual

This manual is intended to describe what you need to know to use gnu as. We cover the syntax expected in source files, including notation for symbols, constants, and expressions; the directives that as understands; and of course how to invoke as.

This manual also describes some of the machine-dependent features of various flavors of the assembler.

On the other hand, this manual is not intended as an introduction to programming in assembly language—let alone programming in general! In a similar vein, we make no attempt to introduce the machine architecture; we do not describe the instruction set, standard mnemonics, registers or addressing modes that are standard to a particular architecture. You may want to consult the manufacturer's machine architecture manual for this information.


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1.2 The GNU Assembler

gnu as is really a family of assemblers. If you use (or have used) the gnu assembler on one architecture, you should find a fairly similar environment when you use it on another architecture. Each version has much in common with the others, including object file formats, most assembler directives (often called pseudo-ops) and assembler syntax.

as is primarily intended to assemble the output of the gnu C compiler gcc for use by the linker ld. Nevertheless, we've tried to make as assemble correctly everything that other assemblers for the same machine would assemble. Any exceptions are documented explicitly (see Machine Dependencies). This doesn't mean as always uses the same syntax as another assembler for the same architecture; for example, we know of several incompatible versions of 680x0 assembly language syntax.

Unlike older assemblers, as is designed to assemble a source program in one pass of the source file. This has a subtle impact on the .org directive (see .org).


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1.3 Object File Formats

The gnu assembler can be configured to produce several alternative object file formats. For the most part, this does not affect how you write assembly language programs; but directives for debugging symbols are typically different in different file formats. See Symbol Attributes.


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1.4 Command Line

After the program name as, the command line may contain options and file names. Options may appear in any order, and may be before, after, or between file names. The order of file names is significant.

-- (two hyphens) by itself names the standard input file explicitly, as one of the files for as to assemble.

Except for -- any command line argument that begins with a hyphen (-) is an option. Each option changes the behavior of as. No option changes the way another option works. An option is a - followed by one or more letters; the case of the letter is important. All options are optional.

Some options expect exactly one file name to follow them. The file name may either immediately follow the option's letter (compatible with older assemblers) or it may be the next command argument (gnu standard). These two command lines are equivalent:

     as -o my-object-file.o mumble.s
     as -omy-object-file.o mumble.s


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1.5 Input Files

We use the phrase source program, abbreviated source, to describe the program input to one run of as. The program may be in one or more files; how the source is partitioned into files doesn't change the meaning of the source.

The source program is a concatenation of the text in all the files, in the order specified.

Each time you run as it assembles exactly one source program. The source program is made up of one or more files. (The standard input is also a file.)

You give as a command line that has zero or more input file names. The input files are read (from left file name to right). A command line argument (in any position) that has no special meaning is taken to be an input file name.

If you give as no file names it attempts to read one input file from the as standard input, which is normally your terminal. You may have to type <ctl-D> to tell as there is no more program to assemble.

Use -- if you need to explicitly name the standard input file in your command line.

If the source is empty, as produces a small, empty object file.

Filenames and Line-numbers

There are two ways of locating a line in the input file (or files) and either may be used in reporting error messages. One way refers to a line number in a physical file; the other refers to a line number in a “logical” file. See Error and Warning Messages.

Physical files are those files named in the command line given to as.

Logical files are simply names declared explicitly by assembler directives; they bear no relation to physical files. Logical file names help error messages reflect the original source file, when as source is itself synthesized from other files. as understands the # directives emitted by the gcc preprocessor. See also .file.


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1.6 Output (Object) File

Every time you run as it produces an output file, which is your assembly language program translated into numbers. This file is the object file. Its default name is a.out. You can give it another name by using the -o option. Conventionally, object file names end with .o. The default name is used for historical reasons: older assemblers were capable of assembling self-contained programs directly into a runnable program. (For some formats, this isn't currently possible, but it can be done for the a.out format.)

The object file is meant for input to the linker ld. It contains assembled program code, information to help ld integrate the assembled program into a runnable file, and (optionally) symbolic information for the debugger.


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1.7 Error and Warning Messages

as may write warnings and error messages to the standard error file (usually your terminal). This should not happen when a compiler runs as automatically. Warnings report an assumption made so that as could keep assembling a flawed program; errors report a grave problem that stops the assembly.

Warning messages have the format

     file_name:NNN:Warning Message Text

(where NNN is a line number). If a logical file name has been given (see .file) it is used for the filename, otherwise the name of the current input file is used. If a logical line number was given (see .line) then it is used to calculate the number printed, otherwise the actual line in the current source file is printed. The message text is intended to be self explanatory (in the grand Unix tradition).

Error messages have the format

     file_name:NNN:FATAL:Error Message Text

The file name and line number are derived as for warning messages. The actual message text may be rather less explanatory because many of them aren't supposed to happen.


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2 Command-Line Options

This chapter describes command-line options available in all versions of the gnu assembler; see Machine Dependencies, for options specific to particular machine architectures.

If you are invoking as via the gnu C compiler, you can use the -Wa option to pass arguments through to the assembler. The assembler arguments must be separated from each other (and the -Wa) by commas. For example:

     gcc -c -g -O -Wa,-alh,-L file.c

This passes two options to the assembler: -alh (emit a listing to standard output with high-level and assembly source) and -L (retain local symbols in the symbol table).

Usually you do not need to use this -Wa mechanism, since many compiler command-line options are automatically passed to the assembler by the compiler. (You can call the gnu compiler driver with the -v option to see precisely what options it passes to each compilation pass, including the assembler.)


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2.1 Enable Listings: -a[cdhlns]

These options enable listing output from the assembler. By itself, -a requests high-level, assembly, and symbols listing. You can use other letters to select specific options for the list: -ah requests a high-level language listing, -al requests an output-program assembly listing, and -as requests a symbol table listing. High-level listings require that a compiler debugging option like -g be used, and that assembly listings (-al) be requested also.

Use the -ac option to omit false conditionals from a listing. Any lines which are not assembled because of a false .if (or .ifdef, or any other conditional), or a true .if followed by an .else, will be omitted from the listing.

Use the -ad option to omit debugging directives from the listing.

Once you have specified one of these options, you can further control listing output and its appearance using the directives .list, .nolist, .psize, .eject, .title, and .sbttl. The -an option turns off all forms processing. If you do not request listing output with one of the -a options, the listing-control directives have no effect.

The letters after -a may be combined into one option, e.g., -aln.

Note if the assembler source is coming from the standard input (e.g., because it is being created by gcc and the -pipe command line switch is being used) then the listing will not contain any comments or preprocessor directives. This is because the listing code buffers input source lines from stdin only after they have been preprocessed by the assembler. This reduces memory usage and makes the code more efficient.


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2.2 --alternate

Begin in alternate macro mode, see .altmacro.


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2.3 -D

This option has no effect whatsoever, but it is accepted to make it more likely that scripts written for other assemblers also work with as.


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2.4 Work Faster: -f

-f should only be used when assembling programs written by a (trusted) compiler. -f stops the assembler from doing whitespace and comment preprocessing on the input file(s) before assembling them. See Preprocessing.

Warning: if you use -f when the files actually need to be preprocessed (if they contain comments, for example), as does not work correctly.


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2.5 .include Search Path: -I path

Use this option to add a path to the list of directories as searches for files specified in .include directives (see .include). You may use -I as many times as necessary to include a variety of paths. The current working directory is always searched first; after that, as searches any -I directories in the same order as they were specified (left to right) on the command line.


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2.6 Difference Tables: -K

as sometimes alters the code emitted for directives of the form .word sym1-sym2. See .word. You can use the -K option if you want a warning issued when this is done.


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2.7 Include Local Symbols: -L

Symbols beginning with system-specific local label prefixes, typically .L for ELF systems or L for traditional a.out systems, are called local symbols. See Symbol Names. Normally you do not see such symbols when debugging, because they are intended for the use of programs (like compilers) that compose assembler programs, not for your notice. Normally both as and ld discard such symbols, so you do not normally debug with them.

This option tells as to retain those local symbols in the object file. Usually if you do this you also tell the linker ld to preserve those symbols.


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2.8 Configuring listing output: --listing

The listing feature of the assembler can be enabled via the command line switch -a (see a). This feature combines the input source file(s) with a hex dump of the corresponding locations in the output object file, and displays them as a listing file. The format of this listing can be controlled by directives inside the assembler source (i.e., .list (see List), .title (see Title), .sbttl (see Sbttl), .psize (see Psize), and .eject (see Eject) and also by the following switches:

--listing-lhs-width=number
Sets the maximum width, in words, of the first line of the hex byte dump. This dump appears on the left hand side of the listing output.
--listing-lhs-width2=number
Sets the maximum width, in words, of any further lines of the hex byte dump for a given input source line. If this value is not specified, it defaults to being the same as the value specified for --listing-lhs-width. If neither switch is used the default is to one.
--listing-rhs-width=number
Sets the maximum width, in characters, of the source line that is displayed alongside the hex dump. The default value for this parameter is 100. The source line is displayed on the right hand side of the listing output.
--listing-cont-lines=number
Sets the maximum number of continuation lines of hex dump that will be displayed for a given single line of source input. The default value is 4.


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2.9 Assemble in MRI Compatibility Mode: -M

The -M or --mri option selects MRI compatibility mode. This changes the syntax and pseudo-op handling of as to make it compatible with the ASM68K or the ASM960 (depending upon the configured target) assembler from Microtec Research. The exact nature of the MRI syntax will not be documented here; see the MRI manuals for more information. Note in particular that the handling of macros and macro arguments is somewhat different. The purpose of this option is to permit assembling existing MRI assembler code using as.

The MRI compatibility is not complete. Certain operations of the MRI assembler depend upon its object file format, and can not be supported using other object file formats. Supporting these would require enhancing each object file format individually. These are:

There are some other features of the MRI assembler which are not supported by as, typically either because they are difficult or because they seem of little consequence. Some of these may be supported in future releases.


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2.10 Dependency Tracking: --MD

as can generate a dependency file for the file it creates. This file consists of a single rule suitable for make describing the dependencies of the main source file.

The rule is written to the file named in its argument.

This feature is used in the automatic updating of makefiles.


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2.11 Name the Object File: -o

There is always one object file output when you run as. By default it has the name a.out (or b.out, for Intel 960 targets only). You use this option (which takes exactly one filename) to give the object file a different name.

Whatever the object file is called, as overwrites any existing file of the same name.


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2.12 Join Data and Text Sections: -R

-R tells as to write the object file as if all data-section data lives in the text section. This is only done at the very last moment: your binary data are the same, but data section parts are relocated differently. The data section part of your object file is zero bytes long because all its bytes are appended to the text section. (See Sections and Relocation.)

When you specify -R it would be possible to generate shorter address displacements (because we do not have to cross between text and data section). We refrain from doing this simply for compatibility with older versions of as. In future, -R may work this way.

When as is configured for COFF or ELF output, this option is only useful if you use sections named .text and .data.

-R is not supported for any of the HPPA targets. Using -R generates a warning from as.


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2.13 Display Assembly Statistics: --statistics

Use --statistics to display two statistics about the resources used by as: the maximum amount of space allocated during the assembly (in bytes), and the total execution time taken for the assembly (in cpu seconds).


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2.14 Compatible Output: --traditional-format

For some targets, the output of as is different in some ways from the output of some existing assembler. This switch requests as to use the traditional format instead.

For example, it disables the exception frame optimizations which as normally does by default on gcc output.


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2.15 Announce Version: -v

You can find out what version of as is running by including the option -v (which you can also spell as -version) on the command line.


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2.16 Control Warnings: -W, --warn, --no-warn, --fatal-warnings

as should never give a warning or error message when assembling compiler output. But programs written by people often cause as to give a warning that a particular assumption was made. All such warnings are directed to the standard error file.

If you use the -W and --no-warn options, no warnings are issued. This only affects the warning messages: it does not change any particular of how as assembles your file. Errors, which stop the assembly, are still reported.

If you use the --fatal-warnings option, as considers files that generate warnings to be in error.

You can switch these options off again by specifying --warn, which causes warnings to be output as usual.


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2.17 Generate Object File in Spite of Errors: -Z

After an error message, as normally produces no output. If for some reason you are interested in object file output even after as gives an error message on your program, use the -Z option. If there are any errors, as continues anyways, and writes an object file after a final warning message of the form n errors, m warnings, generating bad object file.


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3 Syntax

This chapter describes the machine-independent syntax allowed in a source file. as syntax is similar to what many other assemblers use; it is inspired by the BSD 4.2 assembler, except that as does not assemble Vax bit-fields.


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3.1 Preprocessing

The as internal preprocessor:

It does not do macro processing, include file handling, or anything else you may get from your C compiler's preprocessor. You can do include file processing with the .include directive (see .include). You can use the gnu C compiler driver to get other “CPP” style preprocessing by giving the input file a .S suffix. See Options Controlling the Kind of Output (Using GNU CC).

Excess whitespace, comments, and character constants cannot be used in the portions of the input text that are not preprocessed.

If the first line of an input file is #NO_APP or if you use the -f option, whitespace and comments are not removed from the input file. Within an input file, you can ask for whitespace and comment removal in specific portions of the by putting a line that says #APP before the text that may contain whitespace or comments, and putting a line that says #NO_APP after this text. This feature is mainly intend to support asm statements in compilers whose output is otherwise free of comments and whitespace.


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3.2 Whitespace

Whitespace is one or more blanks or tabs, in any order. Whitespace is used to separate symbols, and to make programs neater for people to read. Unless within character constants (see Character Constants), any whitespace means the same as exactly one space.


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3.3 Comments

There are two ways of rendering comments to as. In both cases the comment is equivalent to one space.

Anything from /* through the next */ is a comment. This means you may not nest these comments.

     /*
       The only way to include a newline ('\n') in a comment
       is to use this sort of comment.
     */
     
     /* This sort of comment does not nest. */

Anything from the line comment character to the next newline is considered a comment and is ignored. The line comment character is ; on the ARC; @ on the ARM; ; for the H8/300 family; ; for the HPPA; # on the i386 and x86-64; # on the i960; ; for the PDP-11; ; for picoJava; # for Motorola PowerPC; ! for the Renesas / SuperH SH; ! on the SPARC; # on the ip2k; # on the m32c; # on the m32r; | on the 680x0; # on the 68HC11 and 68HC12; # on the Vax; ; for the Z80; ! for the Z8000; # on the V850; # for Xtensa systems; see Machine Dependencies.

On some machines there are two different line comment characters. One character only begins a comment if it is the first non-whitespace character on a line, while the other always begins a comment.

The V850 assembler also supports a double dash as starting a comment that extends to the end of the line.

--;

To be compatible with past assemblers, lines that begin with # have a special interpretation. Following the # should be an absolute expression (see Expressions): the logical line number of the next line. Then a string (see Strings) is allowed: if present it is a new logical file name. The rest of the line, if any, should be whitespace.

If the first non-whitespace characters on the line are not numeric, the line is ignored. (Just like a comment.)

                               # This is an ordinary comment.
     # 42-6 "new_file_name"    # New logical file name
                               # This is logical line # 36.

This feature is deprecated, and may disappear from future versions of as.


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3.4 Symbols

A symbol is one or more characters chosen from the set of all letters (both upper and lower case), digits and the three characters _.$. On most machines, you can also use $ in symbol names; exceptions are noted in Machine Dependencies. No symbol may begin with a digit. Case is significant. There is no length limit: all characters are significant. Symbols are delimited by characters not in that set, or by the beginning of a file (since the source program must end with a newline, the end of a file is not a possible symbol delimiter). See Symbols.


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3.5 Statements

A statement ends at a newline character (\n) or line separator character. (The line separator is usually ;, unless this conflicts with the comment character; see Machine Dependencies.) The newline or separator character is considered part of the preceding statement. Newlines and separators within character constants are an exception: they do not end statements.

It is an error to end any statement with end-of-file: the last character of any input file should be a newline.

An empty statement is allowed, and may include whitespace. It is ignored.

A statement begins with zero or more labels, optionally followed by a key symbol which determines what kind of statement it is. The key symbol determines the syntax of the rest of the statement. If the symbol begins with a dot . then the statement is an assembler directive: typically valid for any computer. If the symbol begins with a letter the statement is an assembly language instruction: it assembles into a machine language instruction. Different versions of as for different computers recognize different instructions. In fact, the same symbol may represent a different instruction in a different computer's assembly language.

A label is a symbol immediately followed by a colon (:). Whitespace before a label or after a colon is permitted, but you may not have whitespace between a label's symbol and its colon. See Labels.

For HPPA targets, labels need not be immediately followed by a colon, but the definition of a label must begin in column zero. This also implies that only one label may be defined on each line.

     label:     .directive    followed by something
     another_label:           # This is an empty statement.
                instruction   operand_1, operand_2, ...


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3.6 Constants

A constant is a number, written so that its value is known by inspection, without knowing any context. Like this:

     .byte  74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value.
     .ascii "Ring the bell\7"                  # A string constant.
     .octa  0x123456789abcdef0123456789ABCDEF0 # A bignum.
     .float 0f-314159265358979323846264338327\
     95028841971.693993751E-40                 # - pi, a flonum.


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3.6.1 Character Constants

There are two kinds of character constants. A character stands for one character in one byte and its value may be used in numeric expressions. String constants (properly called string literals) are potentially many bytes and their values may not be used in arithmetic expressions.


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3.6.1.1 Strings

A string is written between double-quotes. It may contain double-quotes or null characters. The way to get special characters into a string is to escape these characters: precede them with a backslash \ character. For example \\ represents one backslash: the first \ is an escape which tells as to interpret the second character literally as a backslash (which prevents as from recognizing the second \ as an escape character). The complete list of escapes follows.

\b
Mnemonic for backspace; for ASCII this is octal code 010.


\f
Mnemonic for FormFeed; for ASCII this is octal code 014.


\n
Mnemonic for newline; for ASCII this is octal code 012.


\r
Mnemonic for carriage-Return; for ASCII this is octal code 015.


\t
Mnemonic for horizontal Tab; for ASCII this is octal code 011.


\ digit digit digit
An octal character code. The numeric code is 3 octal digits. For compatibility with other Unix systems, 8 and 9 are accepted as digits: for example, \008 has the value 010, and \009 the value 011.


\x hex-digits...
A hex character code. All trailing hex digits are combined. Either upper or lower case x works.


\\
Represents one \ character.


\"
Represents one " character. Needed in strings to represent this character, because an unescaped " would end the string.
\ anything-else
Any other character when escaped by \ gives a warning, but assembles as if the \ was not present. The idea is that if you used an escape sequence you clearly didn't want the literal interpretation of the following character. However as has no other interpretation, so as knows it is giving you the wrong code and warns you of the fact.

Which characters are escapable, and what those escapes represent, varies widely among assemblers. The current set is what we think the BSD 4.2 assembler recognizes, and is a subset of what most C compilers recognize. If you are in doubt, do not use an escape sequence.


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3.6.1.2 Characters

A single character may be written as a single quote immediately followed by that character. The same escapes apply to characters as to strings. So if you want to write the character backslash, you must write '\\ where the first \ escapes the second \. As you can see, the quote is an acute accent, not a grave accent. A newline immediately following an acute accent is taken as a literal character and does not count as the end of a statement. The value of a character constant in a numeric expression is the machine's byte-wide code for that character. as assumes your character code is ASCII: 'A means 65, 'B means 66, and so on.


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3.6.2 Number Constants

as distinguishes three kinds of numbers according to how they are stored in the target machine. Integers are numbers that would fit into an int in the C language. Bignums are integers, but they are stored in more than 32 bits. Flonums are floating point numbers, described below.


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3.6.2.1 Integers

A binary integer is 0b or 0B followed by zero or more of the binary digits 01.

An octal integer is 0 followed by zero or more of the octal digits (01234567).

A decimal integer starts with a non-zero digit followed by zero or more digits (0123456789).

A hexadecimal integer is 0x or 0X followed by one or more hexadecimal digits chosen from 0123456789abcdefABCDEF.

Integers have the usual values. To denote a negative integer, use the prefix operator - discussed under expressions (see Prefix Operators).


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3.6.2.2 Bignums

A bignum has the same syntax and semantics as an integer except that the number (or its negative) takes more than 32 bits to represent in binary. The distinction is made because in some places integers are permitted while bignums are not.


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3.6.2.3 Flonums

A flonum represents a floating point number. The translation is indirect: a decimal floating point number from the text is converted by as to a generic binary floating point number of more than sufficient precision. This generic floating point number is converted to a particular computer's floating point format (or formats) by a portion of as specialized to that computer.

A flonum is written by writing (in order)

At least one of the integer part or the fractional part must be present. The floating point number has the usual base-10 value.

as does all processing using integers. Flonums are computed independently of any floating point hardware in the computer running as.


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4 Sections and Relocation


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4.1 Background

Roughly, a section is a range of addresses, with no gaps; all data “in” those addresses is treated the same for some particular purpose. For example there may be a “read only” section.

The linker ld reads many object files (partial programs) and combines their contents to form a runnable program. When as emits an object file, the partial program is assumed to start at address 0. ld assigns the final addresses for the partial program, so that different partial programs do not overlap. This is actually an oversimplification, but it suffices to explain how as uses sections.

ld moves blocks of bytes of your program to their run-time addresses. These blocks slide to their run-time addresses as rigid units; their length does not change and neither does the order of bytes within them. Such a rigid unit is called a section. Assigning run-time addresses to sections is called relocation. It includes the task of adjusting mentions of object-file addresses so they refer to the proper run-time addresses. For the H8/300, and for the Renesas / SuperH SH, as pads sections if needed to ensure they end on a word (sixteen bit) boundary.

An object file written by as has at least three sections, any of which may be empty. These are named text, data and bss sections.

When it generates COFF or ELF output, as can also generate whatever other named sections you specify using the .section directive (see .section). If you do not use any directives that place output in the .text or .data sections, these sections still exist, but are empty.

When as generates SOM or ELF output for the HPPA, as can also generate whatever other named sections you specify using the .space and .subspace directives. See HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001) for details on the .space and .subspace assembler directives.

Additionally, as uses different names for the standard text, data, and bss sections when generating SOM output. Program text is placed into the $CODE$ section, data into $DATA$, and BSS into $BSS$.

Within the object file, the text section starts at address 0, the data section follows, and the bss section follows the data section.

When generating either SOM or ELF output files on the HPPA, the text section starts at address 0, the data section at address 0x4000000, and the bss section follows the data section.

To let ld know which data changes when the sections are relocated, and how to change that data, as also writes to the object file details of the relocation needed. To perform relocation ld must know, each time an address in the object file is mentioned:

In fact, every address as ever uses is expressed as

     (section) + (offset into section)

Further, most expressions as computes have this section-relative nature. (For some object formats, such as SOM for the HPPA, some expressions are symbol-relative instead.)

In this manual we use the notation {secname N} to mean “offset N into section secname.”

Apart from text, data and bss sections you need to know about the absolute section. When ld mixes partial programs, addresses in the absolute section remain unchanged. For example, address {absolute 0} is “relocated” to run-time address 0 by ld. Although the linker never arranges two partial programs' data sections with overlapping addresses after linking, by definition their absolute sections must overlap. Address {absolute 239} in one part of a program is always the same address when the program is running as address {absolute 239} in any other part of the program.

The idea of sections is extended to the undefined section. Any address whose section is unknown at assembly time is by definition rendered {undefined U}—where U is filled in later. Since numbers are always defined, the only way to generate an undefined address is to mention an undefined symbol. A reference to a named common block would be such a symbol: its value is unknown at assembly time so it has section undefined.

By analogy the word section is used to describe groups of sections in the linked program. ld puts all partial programs' text sections in contiguous addresses in the linked program. It is customary to refer to the text section of a program, meaning all the addresses of all partial programs' text sections. Likewise for data and bss sections.

Some sections are manipulated by ld; others are invented for use of as and have no meaning except during assembly.


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4.2 Linker Sections

ld deals with just four kinds of sections, summarized below.

named sections
text section
data section
These sections hold your program. as and ld treat them as separate but equal sections. Anything you can say of one section is true of another. When the program is running, however, it is customary for the text section to be unalterable. The text section is often shared among processes: it contains instructions, constants and the like. The data section of a running program is usually alterable: for example, C variables would be stored in the data section.


bss section
This section contains zeroed bytes when your program begins running. It is used to hold uninitialized variables or common storage. The length of each partial program's bss section is important, but because it starts out containing zeroed bytes there is no need to store explicit zero bytes in the object file. The bss section was invented to eliminate those explicit zeros from object files.


absolute section
Address 0 of this section is always “relocated” to runtime address 0. This is useful if you want to refer to an address that ld must not change when relocating. In this sense we speak of absolute addresses being “unrelocatable”: they do not change during relocation.


undefined section
This “section” is a catch-all for address references to objects not in the preceding sections.

An idealized example of three relocatable sections follows. The example uses the traditional section names .text and .data. Memory addresses are on the horizontal axis.

                           +-----+----+--+
     partial program # 1:  |ttttt|dddd|00|
                           +-----+----+--+
     
                           text   data bss
                           seg.   seg. seg.
     
                           +---+---+---+
     partial program # 2:  |TTT|DDD|000|
                           +---+---+---+
     
                           +--+---+-----+--+----+---+-----+~~
     linked program:       |  |TTT|ttttt|  |dddd|DDD|00000|
                           +--+---+-----+--+----+---+-----+~~
     
         addresses:        0 ...


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4.3 Assembler Internal Sections

These sections are meant only for the internal use of as. They have no meaning at run-time. You do not really need to know about these sections for most purposes; but they can be mentioned in as warning messages, so it might be helpful to have an idea of their meanings to as. These sections are used to permit the value of every expression in your assembly language program to be a section-relative address.

ASSEMBLER-INTERNAL-LOGIC-ERROR!
An internal assembler logic error has been found. This means there is a bug in the assembler.


expr section
The assembler stores complex expression internally as combinations of symbols. When it needs to represent an expression as a symbol, it puts it in the expr section.


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4.4 Sub-Sections

Assembled bytes conventionally fall into two sections: text and data. You may have separate groups of data in named sections that you want to end up near to each other in the object file, even though they are not contiguous in the assembler source. as allows you to use subsections for this purpose. Within each section, there can be numbered subsections with values from 0 to 8192. Objects assembled into the same subsection go into the object file together with other objects in the same subsection. For example, a compiler might want to store constants in the text section, but might not want to have them interspersed with the program being assembled. In this case, the compiler could issue a .text 0 before each section of code being output, and a .text 1 before each group of constants being output.

Subsections are optional. If you do not use subsections, everything goes in subsection number zero.

Each subsection is zero-padded up to a multiple of four bytes. (Subsections may be padded a different amount on different flavors of as.)

Subsections appear in your object file in numeric order, lowest numbered to highest. (All this to be compatible with other people's assemblers.) The object file contains no representation of subsections; ld and other programs that manipulate object files see no trace of them. They just see all your text subsections as a text section, and all your data subsections as a data section.

To specify which subsection you want subsequent statements assembled into, use a numeric argument to specify it, in a .text expression or a .data expression statement. When generating COFF output, you can also use an extra subsection argument with arbitrary named sections: .section name, expression. When generating ELF output, you can also use the .subsection directive (see SubSection) to specify a subsection: .subsection expression. Expression should be an absolute expression (see Expressions). If you just say .text then .text 0 is assumed. Likewise .data means .data 0. Assembly begins in text 0. For instance:

     .text 0     # The default subsection is text 0 anyway.
     .ascii "This lives in the first text subsection. *"
     .text 1
     .ascii "But this lives in the second text subsection."
     .data 0
     .ascii "This lives in the data section,"
     .ascii "in the first data subsection."
     .text 0
     .ascii "This lives in the first text section,"
     .ascii "immediately following the asterisk (*)."

Each section has a location counter incremented by one for every byte assembled into that section. Because subsections are merely a convenience restricted to as there is no concept of a subsection location counter. There is no way to directly manipulate a location counter—but the .align directive changes it, and any label definition captures its current value. The location counter of the section where statements are being assembled is said to be the active location counter.


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4.5 bss Section

The bss section is used for local common variable storage. You may allocate address space in the bss section, but you may not dictate data to load into it before your program executes. When your program starts running, all the contents of the bss section are zeroed bytes.

The .lcomm pseudo-op defines a symbol in the bss section; see .lcomm.

The .comm pseudo-op may be used to declare a common symbol, which is another form of uninitialized symbol; see .comm.

When assembling for a target which supports multiple sections, such as ELF or COFF, you may switch into the .bss section and define symbols as usual; see .section. You may only assemble zero values into the section. Typically the section will only contain symbol definitions and .skip directives (see .skip).


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5 Symbols

Symbols are a central concept: the programmer uses symbols to name things, the linker uses symbols to link, and the debugger uses symbols to debug.

Warning: as does not place symbols in the object file in the same order they were declared. This may break some debuggers.


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5.1 Labels

A label is written as a symbol immediately followed by a colon :. The symbol then represents the current value of the active location counter, and is, for example, a suitable instruction operand. You are warned if you use the same symbol to represent two different locations: the first definition overrides any other definitions.

On the HPPA, the usual form for a label need not be immediately followed by a colon, but instead must start in column zero. Only one label may be defined on a single line. To work around this, the HPPA version of as also provides a special directive .label for defining labels more flexibly.


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5.2 Giving Symbols Other Values

A symbol can be given an arbitrary value by writing a symbol, followed by an equals sign =, followed by an expression (see Expressions). This is equivalent to using the .set directive. See .set. In the same way, using a double equals sign == here represents an equivalent of the .eqv directive. See .eqv.


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5.3 Symbol Names

Symbol names begin with a letter or with one of ._. On most machines, you can also use $ in symbol names; exceptions are noted in Machine Dependencies. That character may be followed by any string of digits, letters, dollar signs (unless otherwise noted for a particular target machine), and underscores.

Case of letters is significant: foo is a different symbol name than Foo.

Each symbol has exactly one name. Each name in an assembly language program refers to exactly one symbol. You may use that symbol name any number of times in a program.

Local Symbol Names

A local symbol is any symbol beginning with certain local label prefixes. By default, the local label prefix is .L for ELF systems or L for traditional a.out systems, but each target may have its own set of local label prefixes. On the HPPA local symbols begin with L$.

Local symbols are defined and used within the assembler, but they are normally not saved in object files. Thus, they are not visible when debugging. You may use the -L option (see Include Local Symbols: -L) to retain the local symbols in the object files.

Local Labels

Local labels help compilers and programmers use names temporarily. They create symbols which are guaranteed to be unique over the entire scope of the input source code and which can be referred to by a simple notation. To define a local label, write a label of the form N: (where N represents any positive integer). To refer to the most recent previous definition of that label write Nb, using the same number as when you defined the label. To refer to the next definition of a local label, write Nf—the b stands for “backwards” and the f stands for “forwards”.

There is no restriction on how you can use these labels, and you can reuse them too. So that it is possible to repeatedly define the same local label (using the same number N), although you can only refer to the most recently defined local label of that number (for a backwards reference) or the next definition of a specific local label for a forward reference. It is also worth noting that the first 10 local labels (0:...9:) are implemented in a slightly more efficient manner than the others.

Here is an example:

     1:        branch 1f
     2:        branch 1b
     1:        branch 2f
     2:        branch 1b

Which is the equivalent of:

     label_1:  branch label_3
     label_2:  branch label_1
     label_3:  branch label_4
     label_4:  branch label_3

Local label names are only a notational device. They are immediately transformed into more conventional symbol names before the assembler uses them. The symbol names are stored in the symbol table, appear in error messages, and are optionally emitted to the object file. The names are constructed using these parts:

local label prefix
All local symbols begin with the system-specific local label prefix. Normally both as and ld forget symbols that start with the local label prefix. These labels are used for symbols you are never intended to see. If you use the -L option then as retains these symbols in the object file. If you also instruct ld to retain these symbols, you may use them in debugging.
number
This is the number that was used in the local label definition. So if the label is written 55: then the number is 55.
C-B
This unusual character is included so you do not accidentally invent a symbol of the same name. The character has ASCII value of \002 (control-B).
ordinal number
This is a serial number to keep the labels distinct. The first definition of 0: gets the number 1. The 15th definition of 0: gets the number 15, and so on. Likewise the first definition of 1: gets the number 1 and its 15th definition gets 15 as well.

So for example, the first 1: may be named .L1C-B1, and the 44th 3: may be named .L3C-B44.

Dollar Local Labels

as also supports an even more local form of local labels called dollar labels. These labels go out of scope (i.e., they become undefined) as soon as a non-local label is defined. Thus they remain valid for only a small region of the input source code. Normal local labels, by contrast, remain in scope for the entire file, or until they are redefined by another occurrence of the same local label.

Dollar labels are defined in exactly the same way as ordinary local labels, except that instead of being terminated by a colon, they are terminated by a dollar sign, e.g., 55$.

They can also be distinguished from ordinary local labels by their transformed names which use ASCII character \001 (control-A) as the magic character to distinguish them from ordinary labels. For example, the fifth definition of 6$ may be named .L6C-A5.


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5.4 The Special Dot Symbol

The special symbol . refers to the current address that as is assembling into. Thus, the expression melvin: .long . defines melvin to contain its own address. Assigning a value to . is treated the same as a .org directive. Thus, the expression .=.+4 is the same as saying .space 4.


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5.5 Symbol Attributes

Every symbol has, as well as its name, the attributes “Value” and “Type”. Depending on output format, symbols can also have auxiliary attributes.

If you use a symbol without defining it, as assumes zero for all these attributes, and probably won't warn you. This makes the symbol an externally defined symbol, which is generally what you would want.


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5.5.1 Value

The value of a symbol is (usually) 32 bits. For a symbol which labels a location in the text, data, bss or absolute sections the value is the number of addresses from the start of that section to the label. Naturally for text, data and bss sections the value of a symbol changes as ld changes section base addresses during linking. Absolute symbols' values do not change during linking: that is why they are called absolute.

The value of an undefined symbol is treated in a special way. If it is 0 then the symbol is not defined in this assembler source file, and ld tries to determine its value from other files linked into the same program. You make this kind of symbol simply by mentioning a symbol name without defining it. A non-zero value represents a .comm common declaration. The value is how much common storage to reserve, in bytes (addresses). The symbol refers to the first address of the allocated storage.


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5.5.2 Type

The type attribute of a symbol contains relocation (section) information, any flag settings indicating that a symbol is external, and (optionally), other information for linkers and debuggers. The exact format depends on the object-code output format in use.


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5.5.3 Symbol Attributes: a.out


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5.5.3.1 Descriptor

This is an arbitrary 16-bit value. You may establish a symbol's descriptor value by using a .desc statement (see .desc). A descriptor value means nothing to as.


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5.5.3.2 Other

This is an arbitrary 8-bit value. It means nothing to as.


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5.5.4 Symbol Attributes for COFF

The COFF format supports a multitude of auxiliary symbol attributes; like the primary symbol attributes, they are set between .def and .endef directives.

5.5.4.1 Primary Attributes

The symbol name is set with .def; the value and type, respectively, with .val and .type.

5.5.4.2 Auxiliary Attributes

The as directives .dim, .line, .scl, .size, .tag, and .weak can generate auxiliary symbol table information for COFF.


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5.5.5 Symbol Attributes for SOM

The SOM format for the HPPA supports a multitude of symbol attributes set with the .EXPORT and .IMPORT directives.

The attributes are described in HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001) under the IMPORT and EXPORT assembler directive documentation.


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6 Expressions

An expression specifies an address or numeric value. Whitespace may precede and/or follow an expression.

The result of an expression must be an absolute number, or else an offset into a particular section. If an expression is not absolute, and there is not enough information when as sees the expression to know its section, a second pass over the source program might be necessary to interpret the expression—but the second pass is currently not implemented. as aborts with an error message in this situation.


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6.1 Empty Expressions

An empty expression has no value: it is just whitespace or null. Wherever an absolute expression is required, you may omit the expression, and as assumes a value of (absolute) 0. This is compatible with other assemblers.


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6.2 Integer Expressions

An integer expression is one or more arguments delimited by operators.


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6.2.1 Arguments

Arguments are symbols, numbers or subexpressions. In other contexts arguments are sometimes called “arithmetic operands”. In this manual, to avoid confusing them with the “instruction operands” of the machine language, we use the term “argument” to refer to parts of expressions only, reserving the word “operand” to refer only to machine instruction operands.

Symbols are evaluated to yield {section NNN} where section is one of text, data, bss, absolute, or undefined. NNN is a signed, 2's complement 32 bit integer.

Numbers are usually integers.

A number can be a flonum or bignum. In this case, you are warned that only the low order 32 bits are used, and as pretends these 32 bits are an integer. You may write integer-manipulating instructions that act on exotic constants, compatible with other assemblers.

Subexpressions are a left parenthesis ( followed by an integer expression, followed by a right parenthesis ); or a prefix operator followed by an argument.


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6.2.2 Operators

Operators are arithmetic functions, like + or %. Prefix operators are followed by an argument. Infix operators appear between their arguments. Operators may be preceded and/or followed by whitespace.


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6.2.3 Prefix Operator

as has the following prefix operators. They each take one argument, which must be absolute.

-
Negation. Two's complement negation.
~
Complementation. Bitwise not.


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6.2.4 Infix Operators

Infix operators take two arguments, one on either side. Operators have precedence, but operations with equal precedence are performed left to right. Apart from + or -, both arguments must be absolute, and the result is absolute.

  1. Highest Precedence
    *
    Multiplication.
    /
    Division. Truncation is the same as the C operator /
    %
    Remainder.
    <<
    Shift Left. Same as the C operator <<.
    >>
    Shift Right. Same as the C operator >>.
  2. Intermediate precedence
    |
    Bitwise Inclusive Or.
    &
    Bitwise And.
    ^
    Bitwise Exclusive Or.
    !
    Bitwise Or Not.
  3. Low Precedence
    +
    Addition. If either argument is absolute, the result has the section of the other argument. You may not add together arguments from different sections.


    -
    Subtraction. If the right argument is absolute, the result has the section of the left argument. If both arguments are in the same section, the result is absolute. You may not subtract arguments from different sections.


    ==
    Is Equal To
    <>
    !=
    Is Not Equal To
    <
    Is Less Than
    >
    Is Greater Than
    >=
    Is Greater Than Or Equal To
    <=
    Is Less Than Or Equal To

    The comparison operators can be used as infix operators. A true results has a value of -1 whereas a false result has a value of 0. Note, these operators perform signed comparisons.

  4. Lowest Precedence
    &&
    Logical And.
    ||
    Logical Or.

    These two logical operations can be used to combine the results of sub expressions. Note, unlike the comparison operators a true result returns a value of 1 but a false results does still return 0. Also note that the logical or operator has a slightly lower precedence than logical and.

In short, it's only meaningful to add or subtract the offsets in an address; you can only have a defined section in one of the two arguments.


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7 Assembler Directives

All assembler directives have names that begin with a period (.). The rest of the name is letters, usually in lower case.

This chapter discusses directives that are available regardless of the target machine configuration for the gnu assembler. Some machine configurations provide additional directives. See Machine Dependencies.


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7.1 .abort

This directive stops the assembly immediately. It is for compatibility with other assemblers. The original idea was that the assembly language source would be piped into the assembler. If the sender of the source quit, it could use this directive tells as to quit also. One day .abort will not be supported.


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7.2 .ABORT (COFF)

When producing COFF output, as accepts this directive as a synonym for .abort.


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7.3 .align abs-expr, abs-expr, abs-expr

Pad the location counter (in the current subsection) to a particular storage boundary. The first expression (which must be absolute) is the alignment required, as described below.

The second expression (also absolute) gives the fill value to be stored in the padding bytes. It (and the comma) may be omitted. If it is omitted, the padding bytes are normally zero. However, on some systems, if the section is marked as containing code and the fill value is omitted, the space is filled with no-op instructions.

The third expression is also absolute, and is also optional. If it is present, it is the maximum number of bytes that should be skipped by this alignment directive. If doing the alignment would require skipping more bytes than the specified maximum, then the alignment is not done at all. You can omit the fill value (the second argument) entirely by simply using two commas after the required alignment; this can be useful if you want the alignment to be filled with no-op instructions when appropriate.

The way the required alignment is specified varies from system to system. For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32, s390, sparc, tic4x, tic80 and xtensa, the first expression is the alignment request in bytes. For example .align 8 advances the location counter until it is a multiple of 8. If the location counter is already a multiple of 8, no change is needed. For the tic54x, the first expression is the alignment request in words.

For other systems, including the i386 using a.out format, and the arm and strongarm, it is the number of low-order zero bits the location counter must have after advancement. For example .align 3 advances the location counter until it a multiple of 8. If the location counter is already a multiple of 8, no change is needed.

This inconsistency is due to the different behaviors of the various native assemblers for these systems which GAS must emulate. GAS also provides .balign and .p2align directives, described later, which have a consistent behavior across all architectures (but are specific to GAS).


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7.4 .ascii "string"...

.ascii expects zero or more string literals (see Strings) separated by commas. It assembles each string (with no automatic trailing zero byte) into consecutive addresses.


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7.5 .asciz "string"...

.asciz is just like .ascii, but each string is followed by a zero byte. The “z” in .asciz stands for “zero”.


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7.6 .balign[wl] abs-expr, abs-expr, abs-expr

Pad the location counter (in the current subsection) to a particular storage boundary. The first expression (which must be absolute) is the alignment request in bytes. For example .balign 8 advances the location counter until it is a multiple of 8. If the location counter is already a multiple of 8, no change is needed.

The second expression (also absolute) gives the fill value to be stored in the padding bytes. It (and the comma) may be omitted. If it is omitted, the padding bytes are normally zero. However, on some systems, if the section is marked as containing code and the fill value is omitted, the space is filled with no-op instructions.

The third expression is also absolute, and is also optional. If it is present, it is the maximum number of bytes that should be skipped by this alignment directive. If doing the alignment would require skipping more bytes than the specified maximum, then the alignment is not done at all. You can omit the fill value (the second argument) entirely by simply using two commas after the required alignment; this can be useful if you want the alignment to be filled with no-op instructions when appropriate.

The .balignw and .balignl directives are variants of the .balign directive. The .balignw directive treats the fill pattern as a two byte word value. The .balignl directives treats the fill pattern as a four byte longword value. For example, .balignw 4,0x368d will align to a multiple of 4. If it skips two bytes, they will be filled in with the value 0x368d (the exact placement of the bytes depends upon the endianness of the processor). If it skips 1 or 3 bytes, the fill value is undefined.


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7.7 .byte expressions

.byte expects zero or more expressions, separated by commas. Each expression is assembled into the next byte.


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7.8 .comm symbol , length

.comm declares a common symbol named symbol. When linking, a common symbol in one object file may be merged with a defined or common symbol of the same name in another object file. If ld does not see a definition for the symbol–just one or more common symbols–then it will allocate length bytes of uninitialized memory. length must be an absolute expression. If ld sees multiple common symbols with the same name, and they do not all have the same size, it will allocate space using the largest size.

When using ELF, the .comm directive takes an optional third argument. This is the desired alignment of the symbol, specified as a byte boundary (for example, an alignment of 16 means that the least significant 4 bits of the address should be zero). The alignment must be an absolute expression, and it must be a power of two. If ld allocates uninitialized memory for the common symbol, it will use the alignment when placing the symbol. If no alignment is specified, as will set the alignment to the largest power of two less than or equal to the size of the symbol, up to a maximum of 16.

The syntax for .comm differs slightly on the HPPA. The syntax is symbol .comm, length; symbol is optional.


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7.9 .cfi_startproc [simple]

.cfi_startproc is used at the beginning of each function that should have an entry in .eh_frame. It initializes some internal data structures. Don't forget to close the function by .cfi_endproc.

Unless .cfi_startproc is used along with parameter simple it also emits some architecture dependent initial CFI instructions.

7.10 .cfi_endproc

.cfi_endproc is used at the end of a function where it closes its unwind entry previously opened by .cfi_startproc, and emits it to .eh_frame.

7.11 .cfi_personality encoding [, exp]

.cfi_personality defines personality routine and its encoding. encoding must be a constant determining how the personality should be encoded. If it is 255 (DW_EH_PE_omit), second argument is not present, otherwise second argument should be a constant or a symbol name. When using indirect encodings, the symbol provided should be the location where personality can be loaded from, not the personality routine itself. The default after .cfi_startproc is .cfi_personality 0xff, no personality routine.

7.12 .cfi_lsda encoding [, exp]

.cfi_lsda defines LSDA and its encoding. encoding must be a constant determining how the LSDA should be encoded. If it is 255 (DW_EH_PE_omit), second argument is not present, otherwise second argument should be a constant or a symbol name. The default after .cfi_startproc is .cfi_lsda 0xff, no LSDA.

7.13 .cfi_def_cfa register, offset

.cfi_def_cfa defines a rule for computing CFA as: take address from register and add offset to it.

7.14 .cfi_def_cfa_register register

.cfi_def_cfa_register modifies a rule for computing CFA. From now on register will be used instead of the old one. Offset remains the same.

7.15 .cfi_def_cfa_offset offset

.cfi_def_cfa_offset modifies a rule for computing CFA. Register remains the same, but offset is new. Note that it is the absolute offset that will be added to a defined register to compute CFA address.

7.16 .cfi_adjust_cfa_offset offset

Same as .cfi_def_cfa_offset but offset is a relative value that is added/substracted from the previous offset.

7.17 .cfi_offset register, offset

Previous value of register is saved at offset offset from CFA.

7.18 .cfi_rel_offset register, offset

Previous value of register is saved at offset offset from the current CFA register. This is transformed to .cfi_offset using the known displacement of the CFA register from the CFA. This is often easier to use, because the number will match the code it's annotating.

7.19 .cfi_register register1, register2

Previous value of register1 is saved in register register2.

7.20 .cfi_restore register

.cfi_restore says that the rule for register is now the same as it was at the beginning of the function, after all initial instruction added by .cfi_startproc were executed.

7.21 .cfi_undefined register

From now on the previous value of register can't be restored anymore.

7.22 .cfi_same_value register

Current value of register is the same like in the previous frame, i.e. no restoration needed.

7.23 .cfi_remember_state,

First save all current rules for all registers by .cfi_remember_state, then totally screw them up by subsequent .cfi_* directives and when everything is hopelessly bad, use .cfi_restore_state to restore the previous saved state.

7.24 .cfi_return_column register

Change return column register, i.e. the return address is either directly in register or can be accessed by rules for register.

7.25 .cfi_signal_frame

Mark current function as signal trampoline.

7.26 .cfi_window_save

SPARC register window has been saved.

7.27 .cfi_escape expression[, ...]

Allows the user to add arbitrary bytes to the unwind info. One might use this to add OS-specific CFI opcodes, or generic CFI opcodes that GAS does not yet support.


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7.28 .file fileno filename

When emitting dwarf2 line number information .file assigns filenames to the .debug_line file name table. The fileno operand should be a unique positive integer to use as the index of the entry in the table. The filename operand is a C string literal.

The detail of filename indices is exposed to the user because the filename table is shared with the .debug_info section of the dwarf2 debugging information, and thus the user must know the exact indices that table entries will have.

7.29 .loc fileno lineno [column] [options]

The .loc directive will add row to the .debug_line line number matrix corresponding to the immediately following assembly instruction. The fileno, lineno, and optional column arguments will be applied to the .debug_line state machine before the row is added.

The options are a sequence of the following tokens in any order:

basic_block
This option will set the basic_block register in the .debug_line state machine to true.
prologue_end
This option will set the prologue_end register in the .debug_line state machine to true.
epilogue_begin
This option will set the epilogue_begin register in the .debug_line state machine to true.
is_stmt value
This option will set the is_stmt register in the .debug_line state machine to value, which must be either 0 or 1.
isa value
This directive will set the isa register in the .debug_line state machine to value, which must be an unsigned integer.

7.30 .loc_mark_blocks enable

The .loc_mark_blocks directive makes the assembler emit an entry to the .debug_line line number matrix with the basic_block register in the state machine set whenever a code label is seen. The enable argument should be either 1 or 0, to enable or disable this function respectively.


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7.31 .data subsection

.data tells as to assemble the following statements onto the end of the data subsection numbered subsection (which is an absolute expression). If subsection is omitted, it defaults to zero.


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7.32 .def name

Begin defining debugging information for a symbol name; the definition extends until the .endef directive is encountered.


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7.33 .desc symbol, abs-expression

This directive sets the descriptor of the symbol (see Symbol Attributes) to the low 16 bits of an absolute expression.

The .desc directive is not available when as is configured for COFF output; it is only for a.out or b.out object format. For the sake of compatibility, as accepts it, but produces no output, when configured for COFF.


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7.34 .dim

This directive is generated by compilers to include auxiliary debugging information in the symbol table. It is only permitted inside .def/.endef pairs.


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7.35 .double flonums

.double expects zero or more flonums, separated by commas. It assembles floating point numbers. The exact kind of floating point numbers emitted depends on how as is configured. See Machine Dependencies.


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7.36 .eject

Force a page break at this point, when generating assembly listings.


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7.37 .else

.else is part of the as support for conditional assembly; see .if. It marks the beginning of a section of code to be assembled if the condition for the preceding .if was false.


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7.38 .elseif

.elseif is part of the as support for conditional assembly; see .if. It is shorthand for beginning a new .if block that would otherwise fill the entire .else section.


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7.39 .end

.end marks the end of the assembly file. as does not process anything in the file past the .end directive.


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7.40 .endef

This directive flags the end of a symbol definition begun with .def.


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7.41 .endfunc

.endfunc marks the end of a function specified with .func.


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7.42 .endif

.endif is part of the as support for conditional assembly; it marks the end of a block of code that is only assembled conditionally. See .if.


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7.43 .equ symbol, expression

This directive sets the value of symbol to expression. It is synonymous with .set; see .set.

The syntax for equ on the HPPA is symbol .equ expression.

The syntax for equ on the Z80 is symbol equ expression. On the Z80 it is an eror if symbol is already defined, but the symbol is not protected from later redefinition. Compare Equiv.


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7.44 .equiv symbol, expression

The .equiv directive is like .equ and .set, except that the assembler will signal an error if symbol is already defined. Note a symbol which has been referenced but not actually defined is considered to be undefined.

Except for the contents of the error message, this is roughly equivalent to

     .ifdef SYM
     .err
     .endif
     .equ SYM,VAL

plus it protects the symbol from later redefinition.


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7.45 .eqv symbol, expression

The .eqv directive is like .equiv, but no attempt is made to evaluate the expression or any part of it immediately. Instead each time the resulting symbol is used in an expression, a snapshot of its current value is taken.


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7.46 .err

If as assembles a .err directive, it will print an error message and, unless the -Z option was used, it will not generate an object file. This can be used to signal an error in conditionally compiled code.


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7.47 .error "string"

Similarly to .err, this directive emits an error, but you can specify a string that will be emitted as the error message. If you don't specify the message, it defaults to ".error directive invoked in source file". See Error and Warning Messages.

      .error "This code has not been assembled and tested."


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7.48 .exitm

Exit early from the current macro definition. See Macro.


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7.49 .extern

.extern is accepted in the source program—for compatibility with other assemblers—but it is ignored. as treats all undefined symbols as external.


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7.50 .fail expression

Generates an error or a warning. If the value of the expression is 500 or more, as will print a warning message. If the value is less than 500, as will print an error message. The message will include the value of expression. This can occasionally be useful inside complex nested macros or conditional assembly.


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7.51 .file string

.file tells as that we are about to start a new logical file. string is the new file name. In general, the filename is recognized whether or not it is surrounded by quotes "; but if you wish to specify an empty file name, you must give the quotes–"". This statement may go away in future: it is only recognized to be compatible with old as programs.


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7.52 .fill repeat , size , value

repeat, size and value are absolute expressions. This emits repeat copies of size bytes. Repeat may be zero or more. Size may be zero or more, but if it is more than 8, then it is deemed to have the value 8, compatible with other people's assemblers. The contents of each repeat bytes is taken from an 8-byte number. The highest order 4 bytes are zero. The lowest order 4 bytes are value rendered in the byte-order of an integer on the computer as is assembling for. Each size bytes in a repetition is taken from the lowest order size bytes of this number. Again, this bizarre behavior is compatible with other people's assemblers.

size and value are optional. If the second comma and value are absent, value is assumed zero. If the first comma and following tokens are absent, size is assumed to be 1.


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7.53 .float flonums

This directive assembles zero or more flonums, separated by commas. It has the same effect as .single. The exact kind of floating point numbers emitted depends on how as is configured. See Machine Dependencies.


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7.54 .func name[,label]

.func emits debugging information to denote function name, and is ignored unless the file is assembled with debugging enabled. Only --gstabs[+] is currently supported. label is the entry point of the function and if omitted name prepended with the leading char is used. leading char is usually _ or nothing, depending on the target. All functions are currently defined to have void return type. The function must be terminated with .endfunc.


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7.55 .global symbol, .globl symbol

.global makes the symbol visible to ld. If you define symbol in your partial program, its value is made available to other partial programs that are linked with it. Otherwise, symbol takes its attributes from a symbol of the same name from another file linked into the same program.

Both spellings (.globl and .global) are accepted, for compatibility with other assemblers.

On the HPPA, .global is not always enough to make it accessible to other partial programs. You may need the HPPA-only .EXPORT directive as well. See HPPA Assembler Directives.


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7.56 .hidden names

This is one of the ELF visibility directives. The other two are .internal (see .internal) and .protected (see .protected).

This directive overrides the named symbols default visibility (which is set by their binding: local, global or weak). The directive sets the visibility to hidden which means that the symbols are not visible to other components. Such symbols are always considered to be protected as well.


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7.57 .hword expressions

This expects zero or more expressions, and emits a 16 bit number for each.

This directive is a synonym for .short; depending on the target architecture, it may also be a synonym for .word.


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7.58 .ident

This directive is used by some assemblers to place tags in object files. The behavior of this directive varies depending on the target. When using the a.out object file format, as simply accepts the directive for source-file compatibility with existing assemblers, but does not emit anything for it. When using COFF, comments are emitted to the .comment or .rdata section, depending on the target. When using ELF, comments are emitted to the .comment section.


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7.59 .if absolute expression

.if marks the beginning of a section of code which is only considered part of the source program being assembled if the argument (which must be an absolute expression) is non-zero. The end of the conditional section of code must be marked by .endif (see .endif); optionally, you may include code for the alternative condition, flagged by .else (see .else). If you have several conditions to check, .elseif may be used to avoid nesting blocks if/else within each subsequent .else block.

The following variants of .if are also supported:

.ifdef symbol
Assembles the following section of code if the specified symbol has been defined. Note a symbol which has been referenced but not yet defined is considered to be undefined.


.ifb text
Assembles the following section of code if the operand is blank (empty).


.ifc string1,string2
Assembles the following section of code if the two strings are the same. The strings may be optionally quoted with single quotes. If they are not quoted, the first string stops at the first comma, and the second string stops at the end of the line. Strings which contain whitespace should be quoted. The string comparison is case sensitive.


.ifeq absolute expression
Assembles the following section of code if the argument is zero.


.ifeqs string1,string2
Another form of .ifc. The strings must be quoted using double quotes.


.ifge absolute expression
Assembles the following section of code if the argument is greater than or equal to zero.


.ifgt absolute expression
Assembles the following section of code if the argument is greater than zero.


.ifle absolute expression
Assembles the following section of code if the argument is less than or equal to zero.


.iflt absolute expression
Assembles the following section of code if the argument is less than zero.


.ifnb text
Like .ifb, but the sense of the test is reversed: this assembles the following section of code if the operand is non-blank (non-empty).


.ifnc string1,string2.
Like .ifc, but the sense of the test is reversed: this assembles the following section of code if the two strings are not the same.


.ifndef symbol
.ifnotdef symbol
Assembles the following section of code if the specified symbol has not been defined. Both spelling variants are equivalent. Note a symbol which has been referenced but not yet defined is considered to be undefined.


.ifne absolute expression
Assembles the following section of code if the argument is not equal to zero (in other words, this is equivalent to .if).


.ifnes string1,string2
Like .ifeqs, but the sense of the test is reversed: this assembles the following section of code if the two strings are not the same.


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7.60 .incbin "file"[,skip[,count]]

The incbin directive includes file verbatim at the current location. You can control the search paths used with the -I command-line option (see Command-Line Options). Quotation marks are required around file.

The skip argument skips a number of bytes from the start of the file. The count argument indicates the maximum number of bytes to read. Note that the data is not aligned in any way, so it is the user's responsibility to make sure that proper alignment is provided both before and after the incbin directive.


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7.61 .include "file"

This directive provides a way to include supporting files at specified points in your source program. The code from file is assembled as if it followed the point of the .include; when the end of the included file is reached, assembly of the original file continues. You can control the search paths used with the -I command-line option (see Command-Line Options). Quotation marks are required around file.


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7.62 .int expressions

Expect zero or more expressions, of any section, separated by commas. For each expression, emit a number that, at run time, is the value of that expression. The byte order and bit size of the number depends on what kind of target the assembly is for.


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7.63 .internal names

This is one of the ELF visibility directives. The other two are .hidden (see .hidden) and .protected (see .protected).

This directive overrides the named symbols default visibility (which is set by their binding: local, global or weak). The directive sets the visibility to internal which means that the symbols are considered to be hidden (i.e., not visible to other components), and that some extra, processor specific processing must also be performed upon the symbols as well.


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7.64 .irp symbol,values...

Evaluate a sequence of statements assigning different values to symbol. The sequence of statements starts at the .irp directive, and is terminated by an .endr directive. For each value, symbol is set to value, and the sequence of statements is assembled. If no value is listed, the sequence of statements is assembled once, with symbol set to the null string. To refer to symbol within the sequence of statements, use \symbol.

For example, assembling

             .irp    param,1,2,3
             move    d\param,sp@-
             .endr

is equivalent to assembling

             move    d1,sp@-
             move    d2,sp@-
             move    d3,sp@-

For some caveats with the spelling of symbol, see also Macro.


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7.65 .irpc symbol,values...

Evaluate a sequence of statements assigning different values to symbol. The sequence of statements starts at the .irpc directive, and is terminated by an .endr directive. For each character in value, symbol is set to the character, and the sequence of statements is assembled. If no value is listed, the sequence of statements is assembled once, with symbol set to the null string. To refer to symbol within the sequence of statements, use \symbol.

For example, assembling

             .irpc    param,123
             move    d\param,sp@-
             .endr

is equivalent to assembling

             move    d1,sp@-
             move    d2,sp@-
             move    d3,sp@-

For some caveats with the spelling of symbol, see also the discussion at See Macro.


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7.66 .lcomm symbol , length

Reserve length (an absolute expression) bytes for a local common denoted by symbol. The section and value of symbol are those of the new local common. The addresses are allocated in the bss section, so that at run-time the bytes start off zeroed. Symbol is not declared global (see .global), so is normally not visible to ld.

Some targets permit a third argument to be used with .lcomm. This argument specifies the desired alignment of the symbol in the bss section.

The syntax for .lcomm differs slightly on the HPPA. The syntax is symbol .lcomm, length; symbol is optional.


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7.67 .lflags

as accepts this directive, for compatibility with other assemblers, but ignores it.


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7.68 .line line-number

Change the logical line number. line-number must be an absolute expression. The next line has that logical line number. Therefore any other statements on the current line (after a statement separator character) are reported as on logical line number line-number − 1. One day as will no longer support this directive: it is recognized only for compatibility with existing assembler programs.

Even though this is a directive associated with the a.out or b.out object-code formats, as still recognizes it when producing COFF output, and treats .line as though it were the COFF .ln if it is found outside a .def/.endef pair.

Inside a .def, .line is, instead, one of the directives used by compilers to generate auxiliary symbol information for debugging.


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7.69 .linkonce [type]

Mark the current section so that the linker only includes a single copy of it. This may be used to include the same section in several different object files, but ensure that the linker will only include it once in the final output file. The .linkonce pseudo-op must be used for each instance of the section. Duplicate sections are detected based on the section name, so it should be unique.

This directive is only supported by a few object file formats; as of this writing, the only object file format which supports it is the Portable Executable format used on Windows NT.

The type argument is optional. If specified, it must be one of the following strings. For example:

     .linkonce same_size

Not all types may be supported on all object file formats.

discard
Silently discard duplicate sections. This is the default.
one_only
Warn if there are duplicate sections, but still keep only one copy.
same_size
Warn if any of the duplicates have different sizes.
same_contents
Warn if any of the duplicates do not have exactly the same contents.


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7.70 .ln line-number

.ln is a synonym for .line.


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7.71 .mri val

If val is non-zero, this tells as to enter MRI mode. If val is zero, this tells as to exit MRI mode. This change affects code assembled until the next .mri directive, or until the end of the file. See MRI mode.


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7.72 .list

Control (in conjunction with the .nolist directive) whether or not assembly listings are generated. These two directives maintain an internal counter (which is zero initially). .list increments the counter, and .nolist decrements it. Assembly listings are generated whenever the counter is greater than zero.

By default, listings are disabled. When you enable them (with the -a command line option; see Command-Line Options), the initial value of the listing counter is one.


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7.73 .long expressions

.long is the same as .int. See .int.


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7.74 .macro

The commands .macro and .endm allow you to define macros that generate assembly output. For example, this definition specifies a macro sum that puts a sequence of numbers into memory:

             .macro  sum from=0, to=5
             .long   \from
             .if     \to-\from
             sum     "(\from+1)",\to
             .endif
             .endm

With that definition, SUM 0,5 is equivalent to this assembly input:

             .long   0
             .long   1
             .long   2
             .long   3
             .long   4
             .long   5
.macro macname
.macro macname macargs ...
Begin the definition of a macro called macname. If your macro definition requires arguments, specify their names after the macro name, separated by commas or spaces. You can qualify the macro argument to indicate whether all invocations must specify a non-blank value (through :req), or whether it takes all of the remaining arguments (through :vararg). You can supply a default value for any macro argument by following the name with =deflt. You cannot define two macros with the same macname unless it has been subject to the .purgem directive (see Purgem) between the two definitions. For example, these are all valid .macro statements:
.macro comm
Begin the definition of a macro called comm, which takes no arguments.
.macro plus1 p, p1
.macro plus1 p p1
Either statement begins the definition of a macro called plus1, which takes two arguments; within the macro definition, write \p or \p1 to evaluate the arguments.
.macro reserve_str p1=0 p2
Begin the definition of a macro called reserve_str, with two arguments. The first argument has a default value, but not the second. After the definition is complete, you can call the macro either as reserve_str a,b (with \p1 evaluating to a and \p2 evaluating to b), or as reserve_str ,b (with \p1 evaluating as the default, in this case 0, and \p2 evaluating to b).
.macro m p1:req, p2=0, p3:vararg
Begin the definition of a macro called m, with at least three arguments. The first argument must always have a value specified, but not the second, which instead has a default value. The third formal will get assigned all remaining arguments specified at invocation time.

When you call a macro, you can specify the argument values either by position, or by keyword. For example, sum 9,17 is equivalent to sum to=17, from=9.

Note that since each of the macargs can be an identifier exactly as any other one permitted by the target architecture, there may be occasional problems if the target hand-crafts special meanings to certain characters when they occur in a special position. For example, if the colon (:) is generally permitted to be part of a symbol name, but the architecture specific code special-cases it when occurring as the final character of a symbol (to denote a label), then the macro parameter replacement code will have no way of knowing that and consider the whole construct (including the colon) an identifier, and check only this identifier for being the subject to parameter substitution. So for example this macro definition:

          	.macro label l
          \l:
          	.endm
     

might not work as expected. Invoking label foo might not create a label called foo but instead just insert the text \l: into the assembler source, probably generating an error about an unrecognised identifier.

Similarly problems might occur with the period character (.) which is often allowed inside opcode names (and hence identifier names). So for example constructing a macro to build an opcode from a base name and a length specifier like this:

          	.macro opcode base length
                  \base.\length
          	.endm
     

and invoking it as opcode store l will not create a store.l instruction but instead generate some kind of error as the assembler tries to interpret the text \base.\length.

There are several possible ways around this problem:

Insert white space
If it is possible to use white space characters then this is the simplest solution. eg:
               	.macro label l
               \l :
               	.endm
          

Use \()
The string \() can be used to separate the end of a macro argument from the following text. eg:
               	.macro opcode base length
                       \base\().\length
               	.endm
          

Use the alternate macro syntax mode
In the alternative macro syntax mode the ampersand character (&) can be used as a separator. eg:
               	.altmacro
               	.macro label l
               l&:
               	.endm
          

Note: this problem of correctly identifying string parameters to pseudo ops also applies to the identifiers used in .irp (see Irp) and .irpc (see Irpc) as well.

.endm
Mark the end of a macro definition.
.exitm
Exit early from the current macro definition.


\@
as maintains a counter of how many macros it has executed in this pseudo-variable; you can copy that number to your output with \@, but only within a macro definition.
LOCAL name [ , ... ]
Warning: LOCAL is only available if you select “alternate macro syntax” with --alternate or .altmacro. See .altmacro.


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7.75 .altmacro

Enable alternate macro mode, enabling:

LOCAL name [ , ... ]
One additional directive, LOCAL, is available. It is used to generate a string replacement for each of the name arguments, and replace any instances of name in each macro expansion. The replacement string is unique in the assembly, and different for each separate macro expansion. LOCAL allows you to write macros that define symbols, without fear of conflict between separate macro expansions.
String delimiters
You can write strings delimited in these other ways besides "string":
'string'
You can delimit strings with single-quote characters.
<string>
You can delimit strings with matching angle brackets.

single-character string escape
To include any single character literally in a string (even if the character would otherwise have some special meaning), you can prefix the character with ! (an exclamation mark). For example, you can write <4.3 !> 5.4!!> to get the literal text 4.3 > 5.4!.
Expression results as strings
You can write %expr to evaluate the expression expr and use the result as a string.


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7.76 .noaltmacro

Disable alternate macro mode. See Altmacro.


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7.77 .nolist

Control (in conjunction with the .list directive) whether or not assembly listings are generated. These two directives maintain an internal counter (which is zero initially). .list increments the counter, and .nolist decrements it. Assembly listings are generated whenever the counter is greater than zero.


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7.78 .octa bignums

This directive expects zero or more bignums, separated by commas. For each bignum, it emits a 16-byte integer.

The term “octa” comes from contexts in which a “word” is two bytes; hence octa-word for 16 bytes.


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7.79 .org new-lc , fill

Advance the location counter of the current section to new-lc. new-lc is either an absolute expression or an expression with the same section as the current subsection. That is, you can't use .org to cross sections: if new-lc has the wrong section, the .org directive is ignored. To be compatible with former assemblers, if the section of new-lc is absolute, as issues a warning, then pretends the section of new-lc is the same as the current subsection.

.org may only increase the location counter, or leave it unchanged; you cannot use .org to move the location counter backwards.

Because as tries to assemble programs in one pass, new-lc may not be undefined. If you really detest this restriction we eagerly await a chance to share your improved assembler.

Beware that the origin is relative to the start of the section, not to the start of the subsection. This is compatible with other people's assemblers.

When the location counter (of the current subsection) is advanced, the intervening bytes are filled with fill which should be an absolute expression. If the comma and fill are omitted, fill defaults to zero.


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7.80 .p2align[wl] abs-expr, abs-expr, abs-expr

Pad the location counter (in the current subsection) to a particular storage boundary. The first expression (which must be absolute) is the number of low-order zero bits the location counter must have after advancement. For example .p2align 3 advances the location counter until it a multiple of 8. If the location counter is already a multiple of 8, no change is needed.

The second expression (also absolute) gives the fill value to be stored in the padding bytes. It (and the comma) may be omitted. If it is omitted, the padding bytes are normally zero. However, on some systems, if the section is marked as containing code and the fill value is omitted, the space is filled with no-op instructions.

The third expression is also absolute, and is also optional. If it is present, it is the maximum number of bytes that should be skipped by this alignment directive. If doing the alignment would require skipping more bytes than the specified maximum, then the alignment is not done at all. You can omit the fill value (the second argument) entirely by simply using two commas after the required alignment; this can be useful if you want the alignment to be filled with no-op instructions when appropriate.

The .p2alignw and .p2alignl directives are variants of the .p2align directive. The .p2alignw directive treats the fill pattern as a two byte word value. The .p2alignl directives treats the fill pattern as a four byte longword value. For example, .p2alignw 2,0x368d will align to a multiple of 4. If it skips two bytes, they will be filled in with the value 0x368d (the exact placement of the bytes depends upon the endianness of the processor). If it skips 1 or 3 bytes, the fill value is undefined.


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7.81 .previous

This is one of the ELF section stack manipulation directives. The others are .section (see Section), .subsection (see SubSection), .pushsection (see PushSection), and .popsection (see PopSection).

This directive swaps the current section (and subsection) with most recently referenced section (and subsection) prior to this one. Multiple .previous directives in a row will flip between two sections (and their subsections).

In terms of the section stack, this directive swaps the current section with the top section on the section stack.


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7.82 .popsection

This is one of the ELF section stack manipulation directives. The others are .section (see Section), .subsection (see SubSection), .pushsection (see PushSection), and .previous (see Previous).

This directive replaces the current section (and subsection) with the top section (and subsection) on the section stack. This section is popped off the stack.


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7.83 .print string

as will print string on the standard output during assembly. You must put string in double quotes.


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7.84 .protected names

This is one of the ELF visibility directives. The other two are .hidden (see Hidden) and .internal (see Internal).

This directive overrides the named symbols default visibility (which is set by their binding: local, global or weak). The directive sets the visibility to protected which means that any references to the symbols from within the components that defines them must be resolved to the definition in that component, even if a definition in another component would normally preempt this.


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7.85 .psize lines , columns

Use this directive to declare the number of lines—and, optionally, the number of columns—to use for each page, when generating listings.

If you do not use .psize, listings use a default line-count of 60. You may omit the comma and columns specification; the default width is 200 columns.

as generates formfeeds whenever the specified number of lines is exceeded (or whenever you explicitly request one, using .eject).

If you specify lines as 0, no formfeeds are generated save those explicitly specified with .eject.


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7.86 .purgem name

Undefine the macro name, so that later uses of the string will not be expanded. See Macro.


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7.87 .pushsection name , subsection

This is one of the ELF section stack manipulation directives. The others are .section (see Section), .subsection (see SubSection), .popsection (see PopSection), and .previous (see Previous).

This directive pushes the current section (and subsection) onto the top of the section stack, and then replaces the current section and subsection with name and subsection.


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7.88 .quad bignums

.quad expects zero or more bignums, separated by commas. For each bignum, it emits an 8-byte integer. If the bignum won't fit in 8 bytes, it prints a warning message; and just takes the lowest order 8 bytes of the bignum. The term “quad” comes from contexts in which a “word” is two bytes; hence quad-word for 8 bytes.


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7.89 .reloc offset, reloc_name[, expression]

Generate a relocation at offset of type reloc_name with value expression. If offset is a number, the relocation is generated in the current section. If offset is an expression that resolves to a symbol plus offset, the relocation is generated in the given symbol's section. expression, if present, must resolve to a symbol plus addend or to an absolute value, but note that not all targets support an addend. e.g. ELF REL targets such as i386 store an addend in the section contents rather than in the relocation. This low level interface does not support addends stored in the section.


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7.90 .rept count

Repeat the sequence of lines between the .rept directive and the next .endr directive count times.

For example, assembling

             .rept   3
             .long   0
             .endr

is equivalent to assembling

             .long   0
             .long   0
             .long   0


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7.91 .sbttl "subheading"

Use subheading as the title (third line, immediately after the title line) when generating assembly listings.

This directive affects subsequent pages, as well as the current page if it appears within ten lines of the top of a page.


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7.92 .scl class

Set the storage-class value for a symbol. This directive may only be used inside a .def/.endef pair. Storage class may flag whether a symbol is static or external, or it may record further symbolic debugging information.


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7.93 .section name

Use the .section directive to assemble the following code into a section named name.

This directive is only supported for targets that actually support arbitrarily named sections; on a.out targets, for example, it is not accepted, even with a standard a.out section name.

COFF Version

For COFF targets, the .section directive is used in one of the following ways:

     .section name[, "flags"]
     .section name[, subsegment]

If the optional argument is quoted, it is taken as flags to use for the section. Each flag is a single character. The following flags are recognized:

b
bss section (uninitialized data)
n
section is not loaded
w
writable section
d
data section
r
read-only section
x
executable section
s
shared section (meaningful for PE targets)
a
ignored. (For compatibility with the ELF version)

If no flags are specified, the default flags depend upon the section name. If the section name is not recognized, the default will be for the section to be loaded and writable. Note the n and w flags remove attributes from the section, rather than adding them, so if they are used on their own it will be as if no flags had been specified at all.

If the optional argument to the .section directive is not quoted, it is taken as a subsegment number (see Sub-Sections).

ELF Version

This is one of the ELF section stack manipulation directives. The others are .subsection (see SubSection), .pushsection (see PushSection), .popsection (see PopSection), and .previous (see Previous).

For ELF targets, the .section directive is used like this:

     .section name [, "flags"[, @type[,flag_specific_arguments]]]

The optional flags argument is a quoted string which may contain any combination of the following characters:

a
section is allocatable
w
section is writable
x
section is executable
M
section is mergeable
S
section contains zero terminated strings
G
section is a member of a section group
T
section is used for thread-local-storage

The optional type argument may contain one of the following constants:

@progbits
section contains data
@nobits
section does not contain data (i.e., section only occupies space)
@note
section contains data which is used by things other than the program
@init_array
section contains an array of pointers to init functions
@fini_array
section contains an array of pointers to finish functions
@preinit_array
section contains an array of pointers to pre-init functions

Many targets only support the first three section types.

Note on targets where the @ character is the start of a comment (eg ARM) then another character is used instead. For example the ARM port uses the % character.

If flags contains the M symbol then the type argument must be specified as well as an extra argument—entsize—like this:

     .section name , "flags"M, @type, entsize

Sections with the M flag but not S flag must contain fixed size constants, each entsize octets long. Sections with both M and S must contain zero terminated strings where each character is entsize bytes long. The linker may remove duplicates within sections with the same name, same entity size and same flags. entsize must be an absolute expression.

If flags contains the G symbol then the type argument must be present along with an additional field like this:

     .section name , "flags"G, @type, GroupName[, linkage]

The GroupName field specifies the name of the section group to which this particular section belongs. The optional linkage field can contain:

comdat
indicates that only one copy of this section should be retained
.gnu.linkonce
an alias for comdat

Note: if both the M and G flags are present then the fields for the Merge flag should come first, like this:

     .section name , "flags"MG, @type, entsize, GroupName[, linkage]

If no flags are specified, the default flags depend upon the section name. If the section name is not recognized, the default will be for the section to have none of the above flags: it will not be allocated in memory, nor writable, nor executable. The section will contain data.

For ELF targets, the assembler supports another type of .section directive for compatibility with the Solaris assembler:

     .section "name"[, flags...]

Note that the section name is quoted. There may be a sequence of comma separated flags:

#alloc
section is allocatable
#write
section is writable
#execinstr
section is executable
#tls
section is used for thread local storage

This directive replaces the current section and subsection. See the contents of the gas testsuite directory gas/testsuite/gas/elf for some examples of how this directive and the other section stack directives work.


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7.94 .set symbol, expression

Set the value of symbol to expression. This changes symbol's value and type to conform to expression. If symbol was flagged as external, it remains flagged (see Symbol Attributes).

You may .set a symbol many times in the same assembly.

If you .set a global symbol, the value stored in the object file is the last value stored into it.

The syntax for set on the HPPA is symbol .set expression.

On Z80 set is a real instruction, use symbol defl expression instead.


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7.95 .short expressions

.short is normally the same as .word. See .word.

In some configurations, however, .short and .word generate numbers of different lengths. See Machine Dependencies.


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7.96 .single flonums

This directive assembles zero or more flonums, separated by commas. It has the same effect as .float. The exact kind of floating point numbers emitted depends on how as is configured. See Machine Dependencies.


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7.97 .size

This directive is used to set the size associated with a symbol.

COFF Version

For COFF targets, the .size directive is only permitted inside .def/.endef pairs. It is used like this:

     .size expression

ELF Version

For ELF targets, the .size directive is used like this:

     .size name , expression

This directive sets the size associated with a symbol name. The size in bytes is computed from expression which can make use of label arithmetic. This directive is typically used to set the size of function symbols.


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7.98 .sleb128 expressions

sleb128 stands for “signed little endian base 128.” This is a compact, variable length representation of numbers used by the DWARF symbolic debugging format. See .uleb128.


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7.99 .skip size , fill

This directive emits size bytes, each of value fill. Both size and fill are absolute expressions. If the comma and fill are omitted, fill is assumed to be zero. This is the same as .space.


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7.100 .space size , fill

This directive emits size bytes, each of value fill. Both size and fill are absolute expressions. If the comma and fill are omitted, fill is assumed to be zero. This is the same as .skip.

Warning: .space has a completely different meaning for HPPA targets; use .block as a substitute. See HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001) for the meaning of the .space directive. See HPPA Assembler Directives, for a summary.


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7.101 .stabd, .stabn, .stabs

There are three directives that begin .stab. All emit symbols (see Symbols), for use by symbolic debuggers. The symbols are not entered in the as hash table: they cannot be referenced elsewhere in the source file. Up to five fields are required:

string
This is the symbol's name. It may contain any character except \000, so is more general than ordinary symbol names. Some debuggers used to code arbitrarily complex structures into symbol names using this field.
type
An absolute expression. The symbol's type is set to the low 8 bits of this expression. Any bit pattern is permitted, but ld and debuggers choke on silly bit patterns.
other
An absolute expression. The symbol's “other” attribute is set to the low 8 bits of this expression.
desc
An absolute expression. The symbol's descriptor is set to the low 16 bits of this expression.
value
An absolute expression which becomes the symbol's value.

If a warning is detected while reading a .stabd, .stabn, or .stabs statement, the symbol has probably already been created; you get a half-formed symbol in your object file. This is compatible with earlier assemblers!

.stabd type , other , desc
The “name” of the symbol generated is not even an empty string. It is a null pointer, for compatibility. Older assemblers used a null pointer so they didn't waste space in object files with empty strings.

The symbol's value is set to the location counter, relocatably. When your program is linked, the value of this symbol is the address of the location counter when the .stabd was assembled.


.stabn type , other , desc , value
The name of the symbol is set to the empty string "".


.stabs string , type , other , desc , value
All five fields are specified.


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7.102 .string "str"

Copy the characters in str to the object file. You may specify more than one string to copy, separated by commas. Unless otherwise specified for a particular machine, the assembler marks the end of each string with a 0 byte. You can use any of the escape sequences described in Strings.


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7.103 .struct expression

Switch to the absolute section, and set the section offset to expression, which must be an absolute expression. You might use this as follows:

             .struct 0
     field1:
             .struct field1 + 4
     field2:
             .struct field2 + 4
     field3:

This would define the symbol field1 to have the value 0, the symbol field2 to have the value 4, and the symbol field3 to have the value 8. Assembly would be left in the absolute section, and you would need to use a .section directive of some sort to change to some other section before further assembly.


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7.104 .subsection name

This is one of the ELF section stack manipulation directives. The others are .section (see Section), .pushsection (see PushSection), .popsection (see PopSection), and .previous (see Previous).

This directive replaces the current subsection with name. The current section is not changed. The replaced subsection is put onto the section stack in place of the then current top of stack subsection.


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7.105 .symver

Use the .symver directive to bind symbols to specific version nodes within a source file. This is only supported on ELF platforms, and is typically used when assembling files to be linked into a shared library. There are cases where it may make sense to use this in objects to be bound into an application itself so as to override a versioned symbol from a shared library.

For ELF targets, the .symver directive can be used like this:

     .symver name, name2@nodename

If the symbol name is defined within the file being assembled, the .symver directive effectively creates a symbol alias with the name name2@nodename, and in fact the main reason that we just don't try and create a regular alias is that the @ character isn't permitted in symbol names. The name2 part of the name is the actual name of the symbol by which it will be externally referenced. The name name itself is merely a name of convenience that is used so that it is possible to have definitions for multiple versions of a function within a single source file, and so that the compiler can unambiguously know which version of a function is being mentioned. The nodename portion of the alias should be the name of a node specified in the version script supplied to the linker when building a shared library. If you are attempting to override a versioned symbol from a shared library, then nodename should correspond to the nodename of the symbol you are trying to override.

If the symbol name is not defined within the file being assembled, all references to name will be changed to name2@nodename. If no reference to name is made, name2@nodename will be removed from the symbol table.

Another usage of the .symver directive is:

     .symver name, name2@@nodename

In this case, the symbol name must exist and be defined within the file being assembled. It is similar to name2@nodename. The difference is name2@@nodename will also be used to resolve references to name2 by the linker.

The third usage of the .symver directive is:

     .symver name, name2@@@nodename

When name is not defined within the file being assembled, it is treated as name2@nodename. When name is defined within the file being assembled, the symbol name, name, will be changed to name2@@nodename.


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7.106 .tag structname

This directive is generated by compilers to include auxiliary debugging information in the symbol table. It is only permitted inside .def/.endef pairs. Tags are used to link structure definitions in the symbol table with instances of those structures.


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7.107 .text subsection

Tells as to assemble the following statements onto the end of the text subsection numbered subsection, which is an absolute expression. If subsection is omitted, subsection number zero is used.


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7.108 .title "heading"

Use heading as the title (second line, immediately after the source file name and pagenumber) when generating assembly listings.

This directive affects subsequent pages, as well as the current page if it appears within ten lines of the top of a page.


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7.109 .type

This directive is used to set the type of a symbol.

COFF Version

For COFF targets, this directive is permitted only within .def/.endef pairs. It is used like this:

     .type int

This records the integer int as the type attribute of a symbol table entry.

ELF Version

For ELF targets, the .type directive is used like this:

     .type name , type description

This sets the type of symbol name to be either a function symbol or an object symbol. There are five different syntaxes supported for the type description field, in order to provide compatibility with various other assemblers.

Because some of the characters used in these syntaxes (such as @ and #) are comment characters for some architectures, some of the syntaxes below do not work on all architectures. The first variant will be accepted by the GNU assembler on all architectures so that variant should be used for maximum portability, if you do not need to assemble your code with other assemblers.

The syntaxes supported are:

       .type <name> STT_FUNCTION
       .type <name> STT_OBJECT
     
       .type <name>,#function
       .type <name>,#object
     
       .type <name>,@function
       .type <name>,@object
     
       .type <name>,%function
       .type <name>,%object
     
       .type <name>,"function"
       .type <name>,"object"


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7.110 .uleb128 expressions

uleb128 stands for “unsigned little endian base 128.” This is a compact, variable length representation of numbers used by the DWARF symbolic debugging format. See .sleb128.


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7.111 .val addr

This directive, permitted only within .def/.endef pairs, records the address addr as the value attribute of a symbol table entry.


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7.112 .version "string"

This directive creates a .note section and places into it an ELF formatted note of type NT_VERSION. The note's name is set to string.


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7.113 .vtable_entry table, offset

This directive finds or creates a symbol table and creates a VTABLE_ENTRY relocation for it with an addend of offset.


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7.114 .vtable_inherit child, parent

This directive finds the symbol child and finds or creates the symbol parent and then creates a VTABLE_INHERIT relocation for the parent whose addend is the value of the child symbol. As a special case the parent name of 0 is treated as referring to the *ABS* section.


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7.115 .warning "string"

Similar to the directive .error (see .error "string"), but just emits a warning.


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7.116 .weak names

This directive sets the weak attribute on the comma separated list of symbol names. If the symbols do not already exist, they will be created.

On COFF targets other than PE, weak symbols are a GNU extension. This directive sets the weak attribute on the comma separated list of symbol names. If the symbols do not already exist, they will be created.

On the PE target, weak symbols are supported natively as weak aliases. When a weak symbol is created that is not an alias, GAS creates an alternate symbol to hold the default value.


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7.117 .weakref alias, target

This directive creates an alias to the target symbol that enables the symbol to be referenced with weak-symbol semantics, but without actually making it weak. If direct references or definitions of the symbol are present, then the symbol will not be weak, but if all references to it are through weak references, the symbol will be marked as weak in the symbol table.

The effect is equivalent to moving all references to the alias to a separate assembly source file, renaming the alias to the symbol in it, declaring the symbol as weak there, and running a reloadable link to merge the object files resulting from the assembly of the new source file and the old source file that had the references to the alias removed.

The alias itself never makes to the symbol table, and is entirely handled within the assembler.


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7.118 .word expressions

This directive expects zero or more expressions, of any section, separated by commas.

The size of the number emitted, and its byte order, depend on what target computer the assembly is for.

Warning: Special Treatment to support Compilers

Machines with a 32-bit address space, but that do less than 32-bit addressing, require the following special treatment. If the machine of interest to you does 32-bit addressing (or doesn't require it; see Machine Dependencies), you can ignore this issue.

In order to assemble compiler output into something that works, as occasionally does strange things to .word directives. Directives of the form .word sym1-sym2 are often emitted by compilers as part of jump tables. Therefore, when as assembles a directive of the form .word sym1-sym2, and the difference between sym1 and sym2 does not fit in 16 bits, as creates a secondary jump table, immediately before the next label. This secondary jump table is preceded by a short-jump to the first byte after the secondary table. This short-jump prevents the flow of control from accidentally falling into the new table. Inside the table is a long-jump to sym2. The original .word contains sym1 minus the address of the long-jump to sym2.

If there were several occurrences of .word sym1-sym2 before the secondary jump table, all of them are adjusted. If there was a .word sym3-sym4, that also did not fit in sixteen bits, a long-jump to sym4 is included in the secondary jump table, and the .word directives are adjusted to contain sym3 minus the address of the long-jump to sym4; and so on, for as many entries in the original jump table as necessary.


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7.119 Deprecated Directives

One day these directives won't work. They are included for compatibility with older assemblers.

.abort
.line


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8 Machine Dependent Features

The machine instruction sets are (almost by definition) different on each machine where as runs. Floating point representations vary as well, and as often supports a few additional directives or command-line options for compatibility with other assemblers on a particular platform. Finally, some versions of as support special pseudo-instructions for branch optimization.

This chapter discusses most of these differences, though it does not include details on any machine's instruction set. For details on that subject, see the hardware manufacturer's manual.


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8.1 Alpha Dependent Features


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8.1.1 Notes

The documentation here is primarily for the ELF object format. as also supports the ECOFF and EVAX formats, but features specific to these formats are not yet documented.


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8.1.2 Options

-mcpu
This option specifies the target processor. If an attempt is made to assemble an instruction which will not execute on the target processor, the assembler may either expand the instruction as a macro or issue an error message. This option is equivalent to the .arch directive.

The following processor names are recognized: 21064, 21064a, 21066, 21068, 21164, 21164a, 21164pc, 21264, 21264a, 21264b, ev4, ev5, lca45, ev5, ev56, pca56, ev6, ev67, ev68. The special name all may be used to allow the assembler to accept instructions valid for any Alpha processor.

In order to support existing practice in OSF/1 with respect to .arch, and existing practice within MILO (the Linux ARC bootloader), the numbered processor names (e.g. 21064) enable the processor-specific PALcode instructions, while the “electro-vlasic” names (e.g. ev4) do not.


-mdebug
-no-mdebug
Enables or disables the generation of .mdebug encapsulation for stabs directives and procedure descriptors. The default is to automatically enable .mdebug when the first stabs directive is seen.


-relax
This option forces all relocations to be put into the object file, instead of saving space and resolving some relocations at assembly time. Note that this option does not propagate all symbol arithmetic into the object file, because not all symbol arithmetic can be represented. However, the option can still be useful in specific applications.


-g
This option is used when the compiler generates debug information. When gcc is using mips-tfile to generate debug information for ECOFF, local labels must be passed through to the object file. Otherwise this option has no effect.


-Gsize
A local common symbol larger than size is placed in .bss, while smaller symbols are placed in .sbss.


-F
-32addr
These options are ignored for backward compatibility.


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8.1.3 Syntax

The assembler syntax closely follow the Alpha Reference Manual; assembler directives and general syntax closely follow the OSF/1 and OpenVMS syntax, with a few differences for ELF.


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8.1.3.1 Special Characters

# is the line comment character.

; can be used instead of a newline to separate statements.


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8.1.3.2 Register Names

The 32 integer registers are referred to as $n or $rn. In addition, registers 15, 28, 29, and 30 may be referred to by the symbols $fp, $at, $gp, and $sp respectively.

The 32 floating-point registers are referred to as $fn.


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8.1.3.3 Relocations

Some of these relocations are available for ECOFF, but mostly only for ELF. They are modeled after the relocation format introduced in Digital Unix 4.0, but there are additions.

The format is !tag or !tag!number where tag is the name of the relocation. In some cases number is used to relate specific instructions.

The relocation is placed at the end of the instruction like so:

     ldah  $0,a($29)    !gprelhigh
     lda   $0,a($0)     !gprellow
     ldq   $1,b($29)    !literal!100
     ldl   $2,0($1)     !lituse_base!100
!literal
!literal!N
Used with an ldq instruction to load the address of a symbol from the GOT.

A sequence number N is optional, and if present is used to pair lituse relocations with this literal relocation. The lituse relocations are used by the linker to optimize the code based on the final location of the symbol.

Note that these optimizations are dependent on the data flow of the program. Therefore, if any lituse is paired with a literal relocation, then all uses of the register set by the literal instruction must also be marked with lituse relocations. This is because the original literal instruction may be deleted or transformed into another instruction.

Also note that there may be a one-to-many relationship between literal and lituse, but not a many-to-one. That is, if there are two code paths that load up the same address and feed the value to a single use, then the use may not use a lituse relocation.

!lituse_base!N
Used with any memory format instruction (e.g. ldl) to indicate that the literal is used for an address load. The offset field of the instruction must be zero. During relaxation, the code may be altered to use a gp-relative load.
!lituse_jsr!N
Used with a register branch format instruction (e.g. jsr) to indicate that the literal is used for a call. During relaxation, the code may be altered to use a direct branch (e.g. bsr).
!lituse_jsrdirect!N
Similar to lituse_jsr, but also that this call cannot be vectored through a PLT entry. This is useful for functions with special calling conventions which do not allow the normal call-clobbered registers to be clobbered.
!lituse_bytoff!N
Used with a byte mask instruction (e.g. extbl) to indicate that only the low 3 bits of the address are relevant. During relaxation, the code may be altered to use an immediate instead of a register shift.
!lituse_addr!N
Used with any other instruction to indicate that the original address is in fact used, and the original ldq instruction may not be altered or deleted. This is useful in conjunction with lituse_jsr to test whether a weak symbol is defined.
          ldq  $27,foo($29)   !literal!1
          beq  $27,is_undef   !lituse_addr!1
          jsr  $26,($27),foo  !lituse_jsr!1
     

!lituse_tlsgd!N
Used with a register branch format instruction to indicate that the literal is the call to __tls_get_addr used to compute the address of the thread-local storage variable whose descriptor was loaded with !tlsgd!N.
!lituse_tlsldm!N
Used with a register branch format instruction to indicate that the literal is the call to __tls_get_addr used to compute the address of the base of the thread-local storage block for the current module. The descriptor for the module must have been loaded with !tlsldm!N.
!gpdisp!N
Used with ldah and lda to load the GP from the current address, a-la the ldgp macro. The source register for the ldah instruction must contain the address of the ldah instruction. There must be exactly one lda instruction paired with the ldah instruction, though it may appear anywhere in the instruction stream. The immediate operands must be zero.
          bsr  $26,foo
          ldah $29,0($26)     !gpdisp!1
          lda  $29,0($29)     !gpdisp!1
     

!gprelhigh
Used with an ldah instruction to add the high 16 bits of a 32-bit displacement from the GP.
!gprellow
Used with any memory format instruction to add the low 16 bits of a 32-bit displacement from the GP.
!gprel
Used with any memory format instruction to add a 16-bit displacement from the GP.
!samegp
Used with any branch format instruction to skip the GP load at the target address. The referenced symbol must have the same GP as the source object file, and it must be declared to either not use $27 or perform a standard GP load in the first two instructions via the .prologue directive.
!tlsgd
!tlsgd!N
Used with an lda instruction to load the address of a TLS descriptor for a symbol in the GOT.

The sequence number N is optional, and if present it used to pair the descriptor load with both the literal loading the address of the __tls_get_addr function and the lituse_tlsgd marking the call to that function.

For proper relaxation, both the tlsgd, literal and lituse relocations must be in the same extended basic block. That is, the relocation with the lowest address must be executed first at runtime.

!tlsldm
!tlsldm!N
Used with an lda instruction to load the address of a TLS descriptor for the current module in the GOT.

Similar in other respects to tlsgd.

!gotdtprel
Used with an ldq instruction to load the offset of the TLS symbol within its module's thread-local storage block. Also known as the dynamic thread pointer offset or dtp-relative offset.
!dtprelhi
!dtprello
!dtprel
Like gprel relocations except they compute dtp-relative offsets.
!gottprel
Used with an ldq instruction to load the offset of the TLS symbol from the thread pointer. Also known as the tp-relative offset.
!tprelhi
!tprello
!tprel
Like gprel relocations except they compute tp-relative offsets.


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8.1.4 Floating Point

The Alpha family uses both ieee and VAX floating-point numbers.


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8.1.5 Alpha Assembler Directives

as for the Alpha supports many additional directives for compatibility with the native assembler. This section describes them only briefly.

These are the additional directives in as for the Alpha:

.arch cpu
Specifies the target processor. This is equivalent to the -mcpu command-line option. See Options, for a list of values for cpu.
.ent function[, n]
Mark the beginning of function. An optional number may follow for compatibility with the OSF/1 assembler, but is ignored. When generating .mdebug information, this will create a procedure descriptor for the function. In ELF, it will mark the symbol as a function a-la the generic .type directive.
.end function
Mark the end of function. In ELF, it will set the size of the symbol a-la the generic .size directive.
.mask mask, offset
Indicate which of the integer registers are saved in the current function's stack frame. mask is interpreted a bit mask in which bit n set indicates that register n is saved. The registers are saved in a block located offset bytes from the canonical frame address (CFA) which is the value of the stack pointer on entry to the function. The registers are saved sequentially, except that the return address register (normally $26) is saved first.

This and the other directives that describe the stack frame are currently only used when generating .mdebug information. They may in the future be used to generate DWARF2 .debug_frame unwind information for hand written assembly.

.fmask mask, offset
Indicate which of the floating-point registers are saved in the current stack frame. The mask and offset parameters are interpreted as with .mask.
.frame framereg, frameoffset, retreg[, argoffset]
Describes the shape of the stack frame. The frame pointer in use is framereg; normally this is either $fp or $sp. The frame pointer is frameoffset bytes below the CFA. The return address is initially located in retreg until it is saved as indicated in .mask. For compatibility with OSF/1 an optional argoffset parameter is accepted and ignored. It is believed to indicate the offset from the CFA to the saved argument registers.
.prologue n
Indicate that the stack frame is set up and all registers have been spilled. The argument n indicates whether and how the function uses the incoming procedure vector (the address of the called function) in $27. 0 indicates that $27 is not used; 1 indicates that the first two instructions of the function use $27 to perform a load of the GP register; 2 indicates that $27 is used in some non-standard way and so the linker cannot elide the load of the procedure vector during relaxation.
.usepv function, which
Used to indicate the use of the $27 register, similar to .prologue, but without the other semantics of needing to be inside an open .ent/.end block.

The which argument should be either no, indicating that $27 is not used, or std, indicating that the first two instructions of the function perform a GP load.

One might use this directive instead of .prologue if you are also using dwarf2 CFI directives.

.gprel32 expression
Computes the difference between the address in expression and the GP for the current object file, and stores it in 4 bytes. In addition to being smaller than a full 8 byte address, this also does not require a dynamic relocation when used in a shared library.
.t_floating expression
Stores expression as an ieee double precision value.
.s_floating expression
Stores expression as an ieee single precision value.
.f_floating expression
Stores expression as a VAX F format value.
.g_floating expression
Stores expression as a VAX G format value.
.d_floating expression
Stores expression as a VAX D format value.
.set feature
Enables or disables various assembler features. Using the positive name of the feature enables while using nofeature disables.
at
Indicates that macro expansions may clobber the assembler temporary ($at or $28) register. Some macros may not be expanded without this and will generate an error message if noat is in effect. When at is in effect, a warning will be generated if $at is used by the programmer.
macro
Enables the expansion of macro instructions. Note that variants of real instructions, such as br label vs br $31,label are considered alternate forms and not macros.
move
reorder
volatile
These control whether and how the assembler may re-order instructions. Accepted for compatibility with the OSF/1 assembler, but as does not do instruction scheduling, so these features are ignored.

The following directives are recognized for compatibility with the OSF/1 assembler but are ignored.

     .proc           .aproc
     .reguse         .livereg
     .option         .aent
     .ugen           .eflag
     .alias          .noalias


Previous: Alpha Directives, Up: Alpha-Dependent

8.1.6 Opcodes

For detailed information on the Alpha machine instruction set, see the Alpha Architecture Handbook.


Next: , Previous: Alpha-Dependent, Up: Machine Dependencies

8.2 ARC Dependent Features


Next: , Up: ARC-Dependent

8.2.1 Options

-marc[5|6|7|8]
This option selects the core processor variant. Using -marc is the same as -marc6, which is also the default.
arc5
Base instruction set.


arc6
Jump-and-link (jl) instruction. No requirement of an instruction between setting flags and conditional jump. For example:
                 mov.f r0,r1
                 beq   foo
          


arc7
Break (brk) and sleep (sleep) instructions.


arc8
Software interrupt (swi) instruction.

Note: the .option directive can to be used to select a core variant from within assembly code.


-EB
This option specifies that the output generated by the assembler should be marked as being encoded for a big-endian processor.


-EL
This option specifies that the output generated by the assembler should be marked as being encoded for a little-endian processor - this is the default.


Next: , Previous: ARC Options, Up: ARC-Dependent

8.2.2 Syntax


Next: , Up: ARC Syntax
8.2.2.1 Special Characters

*TODO*


Previous: ARC-Chars, Up: ARC Syntax
8.2.2.2 Register Names

*TODO*


Next: , Previous: ARC Syntax, Up: ARC-Dependent

8.2.3 Floating Point

The ARC core does not currently have hardware floating point support. Software floating point support is provided by GCC and uses ieee floating-point numbers.


Next: , Previous: ARC Floating Point, Up: ARC-Dependent

8.2.4 ARC Machine Directives

The ARC version of as supports the following additional machine directives:

.2byte expressions
*TODO*


.3byte expressions
*TODO*


.4byte expressions
*TODO*


.extAuxRegister name,address,mode
The ARCtangent A4 has extensible auxiliary register space. The auxiliary registers can be defined in the assembler source code by using this directive. The first parameter is the name of the new auxiallry register. The second parameter is the address of the register in the auxiliary register memory map for the variant of the ARC. The third parameter specifies the mode in which the register can be operated is and it can be one of:
r (readonly)
w (write only)
r|w (read or write)

For example:

            .extAuxRegister mulhi,0x12,w
     

This specifies an extension auxiliary register called mulhi which is at address 0x12 in the memory space and which is only writable.


.extCondCode suffix,value
The condition codes on the ARCtangent A4 are extensible and can be specified by means of this assembler directive. They are specified by the suffix and the value for the condition code. They can be used to specify extra condition codes with any values. For example:
            .extCondCode is_busy,0x14
          
             add.is_busy  r1,r2,r3
             bis_busy     _main
     


.extCoreRegister name,regnum,mode,shortcut
Specifies an extension core register name for the application. This allows a register name with a valid regnum between 0 and 60, with the following as valid values for mode
r (readonly)
w (write only)
r|w (read or write)

The other parameter gives a description of the register having a shortcut in the pipeline. The valid values are:

can_shortcut
cannot_shortcut

For example:

            .extCoreRegister mlo,57,r,can_shortcut
     

This defines an extension core register mlo with the value 57 which can shortcut the pipeline.


.extInstruction name,opcode,subopcode,suffixclass,syntaxclass
The ARCtangent A4 allows the user to specify extension instructions. The extension instructions are not macros. The assembler creates encodings for use of these instructions according to the specification by the user. The parameters are:
name
Name of the extension instruction
opcode
Opcode to be used. (Bits 27:31 in the encoding). Valid values 0x10-0x1f or 0x03
subopcode
Subopcode to be used. Valid values are from 0x09-0x3f. However the correct value also depends on syntaxclass
suffixclass
Determines the kinds of suffixes to be allowed. Valid values are SUFFIX_NONE, SUFFIX_COND, SUFFIX_FLAG which indicates the absence or presence of conditional suffixes and flag setting by the extension instruction. It is also possible to specify that an instruction sets the flags and is condtional by using SUFFIX_CODE | SUFFIX_FLAG.
syntaxclass
Determines the syntax class for the instruction. It can have the following values:
SYNTAX_2OP:
2 Operand Instruction
SYNTAX_3OP:
3 Operand Instruction

In addition there could be modifiers for the syntax class as described below:

    Syntax Class Modifiers are:
  • OP1_MUST_BE_IMM: Modifies syntax class SYNTAX_3OP, specifying that the first operand of a three-operand instruction must be an immediate (i.e., the result is discarded). OP1_MUST_BE_IMM is used by bitwise ORing it with SYNTAX_3OP as given in the example below. This could usually be used to set the flags using specific instructions and not retain results.
  • OP1_IMM_IMPLIED: Modifies syntax class SYNTAX_20P, it specifies that there is an implied immediate destination operand which does not appear in the syntax. For example, if the source code contains an instruction like:
                        inst r1,r2
                   

    it really means that the first argument is an implied immediate (that is, the result is discarded). This is the same as though the source code were: inst 0,r1,r2. You use OP1_IMM_IMPLIED by bitwise ORing it with SYNTAX_20P.

For example, defining 64-bit multiplier with immediate operands:

          .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG ,
                          SYNTAX_3OP|OP1_MUST_BE_IMM
     

The above specifies an extension instruction called mp64 which has 3 operands, sets the flags, can be used with a condition code, for which the first operand is an immediate. (Equivalent to discarding the result of the operation).

           .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED
     

This describes a 2 operand instruction with an implicit first immediate operand. The result of this operation would be discarded.


.half expressions
*TODO*


.long expressions
*TODO*


.option arc|arc5|arc6|arc7|arc8
The .option directive must be followed by the desired core version. Again arc is an alias for arc6.

Note: the .option directive overrides the command line option -marc; a warning is emitted when the version is not consistent between the two - even for the implicit default core version (arc6).


.short expressions
*TODO*


.word expressions
*TODO*


Previous: ARC Directives, Up: ARC-Dependent

8.2.5 Opcodes

For information on the ARC instruction set, see ARC Programmers Reference Manual, ARC International (www.arc.com)


Next: , Previous: ARC-Dependent, Up: Machine Dependencies

8.3 ARM Dependent Features


Next: , Up: ARM-Dependent

8.3.1 Options

-mcpu=processor[+extension...]
This option specifies the target processor. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute on the target processor. The following processor names are recognized: arm1, arm2, arm250, arm3, arm6, arm60, arm600, arm610, arm620, arm7, arm7m, arm7d, arm7dm, arm7di, arm7dmi, arm70, arm700, arm700i, arm710, arm710t, arm720, arm720t, arm740t, arm710c, arm7100, arm7500, arm7500fe, arm7t, arm7tdmi, arm7tdmi-s, arm8, arm810, strongarm, strongarm1, strongarm110, strongarm1100, strongarm1110, arm9, arm920, arm920t, arm922t, arm940t, arm9tdmi, arm9e, arm926e, arm926ej-s, arm946e-r0, arm946e, arm946e-s, arm966e-r0, arm966e, arm966e-s, arm968e-s, arm10t, arm10tdmi, arm10e, arm1020, arm1020t, arm1020e, arm1022e, arm1026ej-s, arm1136j-s, arm1136jf-s, arm1156t2-s, arm1156t2f-s, arm1176jz-s, arm1176jzf-s, mpcore, mpcorenovfp, cortex-a8, cortex-r4, cortex-m3, ep9312 (ARM920 with Cirrus Maverick coprocessor), i80200 (Intel XScale processor) iwmmxt (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor) and xscale. The special name all may be used to allow the assembler to accept instructions valid for any ARM processor.

In addition to the basic instruction set, the assembler can be told to accept various extension mnemonics that extend the processor using the co-processor instruction space. For example, -mcpu=arm920+maverick is equivalent to specifying -mcpu=ep9312. The following extensions are currently supported: +maverick +iwmmxt and +xscale.


-march=architecture[+extension...]
This option specifies the target architecture. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute on the target architecture. The following architecture names are recognized: armv1, armv2, armv2a, armv2s, armv3, armv3m, armv4, armv4xm, armv4t, armv4txm, armv5, armv5t, armv5txm, armv5te, armv5texp, armv6, armv6j, armv6k, armv6z, armv6zk, armv7, armv7-a, armv7-r, armv7-m, iwmmxt and xscale. If both -mcpu and -march are specified, the assembler will use the setting for -mcpu.

The architecture option can be extended with the same instruction set extension options as the -mcpu option.


-mfpu=floating-point-format
This option specifies the floating point format to assemble for. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute on the target floating point unit. The following format options are recognized: softfpa, fpe, fpe2, fpe3, fpa, fpa10, fpa11, arm7500fe, softvfp, softvfp+vfp, vfp, vfp10, vfp10-r0, vfp9, vfpxd, arm1020t, arm1020e, arm1136jf-s and maverick.

In addition to determining which instructions are assembled, this option also affects the way in which the .double assembler directive behaves when assembling little-endian code.

The default is dependent on the processor selected. For Architecture 5 or later, the default is to assembler for VFP instructions; for earlier architectures the default is to assemble for FPA instructions.


-mthumb
This option specifies that the assembler should start assembling Thumb instructions; that is, it should behave as though the file starts with a .code 16 directive.


-mthumb-interwork
This option specifies that the output generated by the assembler should be marked as supporting interworking.


-mapcs [26|32]
This option specifies that the output generated by the assembler should be marked as supporting the indicated version of the Arm Procedure. Calling Standard.


-matpcs
This option specifies that the output generated by the assembler should be marked as supporting the Arm/Thumb Procedure Calling Standard. If enabled this option will cause the assembler to create an empty debugging section in the object file called .arm.atpcs. Debuggers can use this to determine the ABI being used by.


-mapcs-float
This indicates the floating point variant of the APCS should be used. In this variant floating point arguments are passed in FP registers rather than integer registers.


-mapcs-reentrant
This indicates that the reentrant variant of the APCS should be used. This variant supports position independent code.


-mfloat-abi=abi
This option specifies that the output generated by the assembler should be marked as using specified floating point ABI. The following values are recognized: soft, softfp and hard.


-meabi=ver
This option specifies which EABI version the produced object files should conform to. The following values are recognized: gnu, 4 and 5.


-EB
This option specifies that the output generated by the assembler should be marked as being encoded for a big-endian processor.


-EL
This option specifies that the output generated by the assembler should be marked as being encoded for a little-endian processor.


-k
This option specifies that the output of the assembler should be marked as position-independent code (PIC).


Next: , Previous: ARM Options, Up: ARM-Dependent

8.3.2 Syntax


Next: , Up: ARM Syntax
8.3.2.1 Special Characters

The presence of a @ on a line indicates the start of a comment that extends to the end of the current line. If a # appears as the first character of a line, the whole line is treated as a comment.

The ; character can be used instead of a newline to separate statements.

Either # or $ can be used to indicate immediate operands.

*TODO* Explain about /data modifier on symbols.


Next: , Previous: ARM-Chars, Up: ARM Syntax
8.3.2.2 Register Names

*TODO* Explain about ARM register naming, and the predefined names.


Next: , Previous: ARM Syntax, Up: ARM-Dependent

8.3.3 Floating Point

The ARM family uses ieee floating-point numbers.


Previous: ARM-Regs, Up: ARM Syntax
8.3.3.1 ARM relocation generation

Specific data relocations can be generated by putting the relocation name in parentheses after the symbol name. For example:

             .word foo(TARGET1)

This will generate an R_ARM_TARGET1 relocation against the symbol foo. The following relocations are supported: GOT, GOTOFF, TARGET1, TARGET2, SBREL, TLSGD, TLSLDM, TLSLDO, GOTTPOFF and TPOFF.

For compatibility with older toolchains the assembler also accepts (PLT) after branch targets. This will generate the deprecated R_ARM_PLT32 relocation.

Relocations for MOVW and MOVT instructions can be generated by prefixing the value with #:lower16: and #:upper16 respectively. For example to load the 32-bit address of foo into r0:

             MOVW r0, #:lower16:foo
             MOVT r0, #:upper16:foo


Next: , Previous: ARM Floating Point, Up: ARM-Dependent

8.3.4 ARM Machine Directives

.align expression [, expression]
This is the generic .align directive. For the ARM however if the first argument is zero (ie no alignment is needed) the assembler will behave as if the argument had been 2 (ie pad to the next four byte boundary). This is for compatibility with ARM's own assembler.


name .req register name
This creates an alias for register name called name. For example:
                  foo .req r0
     


.unreq alias-name
This undefines a register alias which was previously defined using the req, dn or qn directives. For example:
                  foo .req r0
                  .unreq foo
     

An error occurs if the name is undefined. Note - this pseudo op can be used to delete builtin in register name aliases (eg 'r0'). This should only be done if it is really necessary.


name .dn register name [.type] [[index]]
name .qn register name [.type] [[index]]
The dn and qn directives are used to create typed and/or indexed register aliases for use in Advanced SIMD Extension (Neon) instructions. The former should be used to create aliases of double-precision registers, and the latter to create aliases of quad-precision registers.

If these directives are used to create typed aliases, those aliases can be used in Neon instructions instead of writing types after the mnemonic or after each operand. For example:

                  x .dn d2.f32
                  y .dn d3.f32
                  z .dn d4.f32[1]
                  vmul x,y,z
     

This is equivalent to writing the following:

                  vmul.f32 d2,d3,d4[1]
     

Aliases created using dn or qn can be destroyed using unreq.


.code [16|32]
This directive selects the instruction set being generated. The value 16 selects Thumb, with the value 32 selecting ARM.


.thumb
This performs the same action as .code 16.


.arm
This performs the same action as .code 32.


.force_thumb
This directive forces the selection of Thumb instructions, even if the target processor does not support those instructions


.thumb_func
This directive specifies that the following symbol is the name of a Thumb encoded function. This information is necessary in order to allow the assembler and linker to generate correct code for interworking between Arm and Thumb instructions and should be used even if interworking is not going to be performed. The presence of this directive also implies .thumb

This directive is not neccessary when generating EABI objects. On these targets the encoding is implicit when generating Thumb code.


.thumb_set
This performs the equivalent of a .set directive in that it creates a symbol which is an alias for another symbol (possibly not yet defined). This directive also has the added property in that it marks the aliased symbol as being a thumb function entry point, in the same way that the .thumb_func directive does.


.ltorg
This directive causes the current contents of the literal pool to be dumped into the current section (which is assumed to be the .text section) at the current location (aligned to a word boundary). GAS maintains a separate literal pool for each section and each sub-section. The .ltorg directive will only affect the literal pool of the current section and sub-section. At the end of assembly all remaining, un-empty literal pools will automatically be dumped.

Note - older versions of GAS would dump the current literal pool any time a section change occurred. This is no longer done, since it prevents accurate control of the placement of literal pools.


.pool
This is a synonym for .ltorg.


.unwind_fnstart
Marks the start of a function with an unwind table entry.


.unwind_fnend
Marks the end of a function with an unwind table entry. The unwind index table entry is created when this directive is processed.

If no personality routine has been specified then standard personality routine 0 or 1 will be used, depending on the number of unwind opcodes required.


.cantunwind
Prevents unwinding through the current function. No personality routine or exception table data is required or permitted.


.personality name
Sets the personality routine for the current function to name.


.personalityindex index
Sets the personality routine for the current function to the EABI standard routine number index


.handlerdata
Marks the end of the current function, and the start of the exception table entry for that function. Anything between this directive and the .fnend directive will be added to the exception table entry.

Must be preceded by a .personality or .personalityindex directive.


.save reglist
Generate unwinder annotations to restore the registers in reglist. The format of reglist is the same as the corresponding store-multiple instruction.
     
core registers
.save {r4, r5, r6, lr} stmfd sp!, {r4, r5, r6, lr}
FPA registers
.save f4, 2 sfmfd f4, 2, [sp]!
VFP registers
.save {d8, d9, d10} fstmdx sp!, {d8, d9, d10}
iWMMXt registers
.save {wr10, wr11} wstrd wr11, [sp, #-8]! wstrd wr10, [sp, #-8]! or .save wr11 wstrd wr11, [sp, #-8]! .save wr10 wstrd wr10, [sp, #-8]!


.vsave vfp-reglist
Generate unwinder annotations to restore the VFP registers in vfp-reglist using FLDMD. Also works for VFPv3 registers that are to be restored using VLDM. The format of vfp-reglist is the same as the corresponding store-multiple instruction.
     
VFP registers
.vsave {d8, d9, d10} fstmdd sp!, {d8, d9, d10}
VFPv3 registers
.vsave {d15, d16, d17} vstm sp!, {d15, d16, d17}

Since FLDMX and FSTMX are now deprecated, this directive should be used in favour of .save for saving VFP registers for ARMv6 and above.


.pad #count
Generate unwinder annotations for a stack adjustment of count bytes. A positive value indicates the function prologue allocated stack space by decrementing the stack pointer.


.movsp reg [, #offset]
Tell the unwinder that reg contains an offset from the current stack pointer. If offset is not specified then it is assumed to be zero.


.setfp fpreg, spreg [, #offset]
Make all unwinder annotations relaive to a frame pointer. Without this the unwinder will use offsets from the stack pointer.

The syntax of this directive is the same as the sub or mov instruction used to set the frame pointer. spreg must be either sp or mentioned in a previous .movsp directive.

          .movsp ip
          mov ip, sp
          ...
          .setfp fp, ip, #4
          sub fp, ip, #4
     


.raw offset, byte1, ...
Insert one of more arbitary unwind opcode bytes, which are known to adjust the stack pointer by offset bytes.

For example .unwind_raw 4, 0xb1, 0x01 is equivalent to .save {r0}


.cpu name
Select the target processor. Valid values for name are the same as for the -mcpu commandline option.


.arch name
Select the target architecture. Valid values for name are the same as for the -march commandline option.


.object_arch name
Override the architecture recorded in the EABI object attribute section. Valid values for name are the same as for the .arch directive. Typically this is useful when code uses runtime detection of CPU features.


.fpu name
Select the floating point unit to assemble for. Valid values for name are the same as for the -mfpu commandline option.


.eabi_attribute tag, value
Set the EABI object attribute number tag to value. The value is either a number, "string", or number, "string" depending on the tag.


Next: , Previous: ARM Directives, Up: ARM-Dependent

8.3.5 Opcodes

as implements all the standard ARM opcodes. It also implements several pseudo opcodes, including several synthetic load instructions.

NOP
            nop
     

This pseudo op will always evaluate to a legal ARM instruction that does nothing. Currently it will evaluate to MOV r0, r0.


LDR
            ldr <register> , = <expression>
     

If expression evaluates to a numeric constant then a MOV or MVN instruction will be used in place of the LDR instruction, if the constant can be generated by either of these instructions. Otherwise the constant will be placed into the nearest literal pool (if it not already there) and a PC relative LDR instruction will be generated.


ADR
            adr <register> <label>
     

This instruction will load the address of label into the indicated register. The instruction will evaluate to a PC relative ADD or SUB instruction depending upon where the label is located. If the label is out of range, or if it is not defined in the same file (and section) as the ADR instruction, then an error will be generated. This instruction will not make use of the literal pool.


ADRL
            adrl <register> <label>
     

This instruction will load the address of label into the indicated register. The instruction will evaluate to one or two PC relative ADD or SUB instructions depending upon where the label is located. If a second instruction is not needed a NOP instruction will be generated in its place, so that this instruction is always 8 bytes long.

If the label is out of range, or if it is not defined in the same file (and section) as the ADRL instruction, then an error will be generated. This instruction will not make use of the literal pool.

For information on the ARM or Thumb instruction sets, see ARM Software Development Toolkit Reference Manual, Advanced RISC Machines Ltd.


Previous: ARM Opcodes, Up: ARM-Dependent

8.3.6 Mapping Symbols

The ARM ELF specification requires that special symbols be inserted into object files to mark certain features:

$a
At the start of a region of code containing ARM instructions.


$t
At the start of a region of code containing THUMB instructions.


$d
At the start of a region of data.

The assembler will automatically insert these symbols for you - there is no need to code them yourself. Support for tagging symbols ($b, $f, $p and $m) which is also mentioned in the current ARM ELF specification is not implemented. This is because they have been dropped from the new EABI and so tools cannot rely upon their presence.


Next: , Previous: ARM-Dependent, Up: Machine Dependencies

8.4 AVR Dependent Features


Next: , Up: AVR-Dependent

8.4.1 Options

-mmcu=mcu
Specify ATMEL AVR instruction set or MCU type.

Instruction set avr1 is for the minimal AVR core, not supported by the C compiler, only for assembler programs (MCU types: at90s1200, attiny10, attiny11, attiny12, attiny15, attiny28).

Instruction set avr2 (default) is for the classic AVR core with up to 8K program memory space (MCU types: at90s2313, at90s2323, attiny22, attiny26, at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535, at86rf401, attiny13, attiny2313, attiny261, attiny461, attiny861, attiny24, attiny44, attiny84, attiny25, attiny45, attiny85).

Instruction set avr3 is for the classic AVR core with up to 128K program memory space (MCU types: atmega103, atmega603, at43usb320, at43usb355, at76c711).

Instruction set avr4 is for the enhanced AVR core with up to 8K program memory space (MCU types: atmega48, atmega8, atmega83, atmega85, atmega88, atmega8515, atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm3).

Instruction set avr5 is for the enhanced AVR core with up to 128K program memory space (MCU types: atmega16, atmega161, atmega162, atmega163, atmega164p, atmega165, atmega165p, atmega168, atmega169, atmega169p, atmega32, atmega323, atmega324p, atmega325, atmega325p, atmega329, atmega329p, atmega3250, atmega3250p, atmega3290, atmega3290p, atmega406, atmega64, atmega640, atmega644, atmega644p, atmega128, atmega1280, atmega1281, atmega645, atmega649, atmega6450, atmega6490, atmega16hva, at90can32, at90can64, at90can128, at90usb82, at90usb162, at90usb646, at90usb647, at90usb1286, at90usb1287, at94k).

Instruction set avr6 is for the enhanced AVR core with 256K program memory space (MCU types: atmega2560, atmega2561).


-mall-opcodes
Accept all AVR opcodes, even if not supported by -mmcu.


-mno-skip-bug
This option disable warnings for skipping two-word instructions.


-mno-wrap
This option reject rjmp/rcall instructions with 8K wrap-around.


Next: , Previous: AVR Options, Up: AVR-Dependent

8.4.2 Syntax


Next: , Up: AVR Syntax
8.4.2.1 Special Characters

The presence of a ; on a line indicates the start of a comment that extends to the end of the current line. If a # appears as the first character of a line, the whole line is treated as a comment.

The $ character can be used instead of a newline to separate statements.


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8.4.2.2 Register Names

The AVR has 32 x 8-bit general purpose working registers r0, r1, ... r31. Six of the 32 registers can be used as three 16-bit indirect address register pointers for Data Space addressing. One of the these address pointers can also be used as an address pointer for look up tables in Flash program memory. These added function registers are the 16-bit X, Y and Z - registers.

     X = r26:r27
     Y = r28:r29
     Z = r30:r31


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8.4.2.3 Relocatable Expression Modifiers

The assembler supports several modifiers when using relocatable addresses in AVR instruction operands. The general syntax is the following:

     modifier(relocatable-expression)
lo8
This modifier allows you to use bits 0 through 7 of an address expression as 8 bit relocatable expression.
hi8
This modifier allows you to use bits 7 through 15 of an address expression as 8 bit relocatable expression. This is useful with, for example, the AVR ldi instruction and lo8 modifier.

For example

          ldi r26, lo8(sym+10)
          ldi r27, hi8(sym+10)
     

hh8
This modifier allows you to use bits 16 through 23 of an address expression as 8 bit relocatable expression. Also, can be useful for loading 32 bit constants.
hlo8
Synonym of hh8.
hhi8
This modifier allows you to use bits 24 through 31 of an expression as 8 bit expression. This is useful with, for example, the AVR ldi instruction and lo8, hi8, hlo8, hhi8, modifier.

For example

          ldi r26, lo8(285774925)
          ldi r27, hi8(285774925)
          ldi r28, hlo8(285774925)
          ldi r29, hhi8(285774925)
          ; r29,r28,r27,r26 = 285774925
     

pm_lo8
This modifier allows you to use bits 0 through 7 of an address expression as 8 bit relocatable expression. This modifier useful for addressing data or code from Flash/Program memory. The using of pm_lo8 similar to lo8.
pm_hi8
This modifier allows you to use bits 8 through 15 of an address expression as 8 bit relocatable expression. This modifier useful for addressing data or code from Flash/Program memory.
pm_hh8
This modifier allows you to use bits 15 through 23 of an address expression as 8 bit relocatable expression. This modifier useful for addressing data or code from Flash/Program memory.


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8.4.3 Opcodes

For detailed information on the AVR machine instruction set, see www.atmel.com/products/AVR.

as implements all the standard AVR opcodes. The following table summarizes the AVR opcodes, and their arguments.

     Legend:
        r   any register
        d   `ldi' register (r16-r31)
        v   `movw' even register (r0, r2, ..., r28, r30)
        a   `fmul' register (r16-r23)
        w   `adiw' register (r24,r26,r28,r30)
        e   pointer registers (X,Y,Z)
        b   base pointer register and displacement ([YZ]+disp)
        z   Z pointer register (for [e]lpm Rd,Z[+])
        M   immediate value from 0 to 255
        n   immediate value from 0 to 255 ( n = ~M ). Relocation impossible
        s   immediate value from 0 to 7
        P   Port address value from 0 to 63. (in, out)
        p   Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
        K   immediate value from 0 to 63 (used in `adiw', `sbiw')
        i   immediate value
        l   signed pc relative offset from -64 to 63
        L   signed pc relative offset from -2048 to 2047
        h   absolute code address (call, jmp)
        S   immediate value from 0 to 7 (S = s << 4)
        ?   use this opcode entry if no parameters, else use next opcode entry
     
     1001010010001000   clc
     1001010011011000   clh
     1001010011111000   cli
     1001010010101000   cln
     1001010011001000   cls
     1001010011101000   clt
     1001010010111000   clv
     1001010010011000   clz
     1001010000001000   sec
     1001010001011000   seh
     1001010001111000   sei
     1001010000101000   sen
     1001010001001000   ses
     1001010001101000   set
     1001010000111000   sev
     1001010000011000   sez
     100101001SSS1000   bclr    S
     100101000SSS1000   bset    S
     1001010100001001   icall
     1001010000001001   ijmp
     1001010111001000   lpm     ?
     1001000ddddd010+   lpm     r,z
     1001010111011000   elpm    ?
     1001000ddddd011+   elpm    r,z
     0000000000000000   nop
     1001010100001000   ret
     1001010100011000   reti
     1001010110001000   sleep
     1001010110011000   break
     1001010110101000   wdr
     1001010111101000   spm
     000111rdddddrrrr   adc     r,r
     000011rdddddrrrr   add     r,r
     001000rdddddrrrr   and     r,r
     000101rdddddrrrr   cp      r,r
     000001rdddddrrrr   cpc     r,r
     000100rdddddrrrr   cpse    r,r
     001001rdddddrrrr   eor     r,r
     001011rdddddrrrr   mov     r,r
     100111rdddddrrrr   mul     r,r
     001010rdddddrrrr   or      r,r
     000010rdddddrrrr   sbc     r,r
     000110rdddddrrrr   sub     r,r
     001001rdddddrrrr   clr     r
     000011rdddddrrrr   lsl     r
     000111rdddddrrrr   rol     r
     001000rdddddrrrr   tst     r
     0111KKKKddddKKKK   andi    d,M
     0111KKKKddddKKKK   cbr     d,n
     1110KKKKddddKKKK   ldi     d,M
     11101111dddd1111   ser     d
     0110KKKKddddKKKK   ori     d,M
     0110KKKKddddKKKK   sbr     d,M
     0011KKKKddddKKKK   cpi     d,M
     0100KKKKddddKKKK   sbci    d,M
     0101KKKKddddKKKK   subi    d,M
     1111110rrrrr0sss   sbrc    r,s
     1111111rrrrr0sss   sbrs    r,s
     1111100ddddd0sss   bld     r,s
     1111101ddddd0sss   bst     r,s
     10110PPdddddPPPP   in      r,P
     10111PPrrrrrPPPP   out     P,r
     10010110KKddKKKK   adiw    w,K
     10010111KKddKKKK   sbiw    w,K
     10011000pppppsss   cbi     p,s
     10011010pppppsss   sbi     p,s
     10011001pppppsss   sbic    p,s
     10011011pppppsss   sbis    p,s
     111101lllllll000   brcc    l
     111100lllllll000   brcs    l
     111100lllllll001   breq    l
     111101lllllll100   brge    l
     111101lllllll101   brhc    l
     111100lllllll101   brhs    l
     111101lllllll111   brid    l
     111100lllllll111   brie    l
     111100lllllll000   brlo    l
     111100lllllll100   brlt    l
     111100lllllll010   brmi    l
     111101lllllll001   brne    l
     111101lllllll010   brpl    l
     111101lllllll000   brsh    l
     111101lllllll110   brtc    l
     111100lllllll110   brts    l
     111101lllllll011   brvc    l
     111100lllllll011   brvs    l
     111101lllllllsss   brbc    s,l
     111100lllllllsss   brbs    s,l
     1101LLLLLLLLLLLL   rcall   L
     1100LLLLLLLLLLLL   rjmp    L
     1001010hhhhh111h   call    h
     1001010hhhhh110h   jmp     h
     1001010rrrrr0101   asr     r
     1001010rrrrr0000   com     r
     1001010rrrrr1010   dec     r
     1001010rrrrr0011   inc     r
     1001010rrrrr0110   lsr     r
     1001010rrrrr0001   neg     r
     1001000rrrrr1111   pop     r
     1001001rrrrr1111   push    r
     1001010rrrrr0111   ror     r
     1001010rrrrr0010   swap    r
     00000001ddddrrrr   movw    v,v
     00000010ddddrrrr   muls    d,d
     000000110ddd0rrr   mulsu   a,a
     000000110ddd1rrr   fmul    a,a
     000000111ddd0rrr   fmuls   a,a
     000000111ddd1rrr   fmulsu  a,a
     1001001ddddd0000   sts     i,r
     1001000ddddd0000   lds     r,i
     10o0oo0dddddbooo   ldd     r,b
     100!000dddddee-+   ld      r,e
     10o0oo1rrrrrbooo   std     b,r
     100!001rrrrree-+   st      e,r
     1001010100011001   eicall
     1001010000011001   eijmp


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8.5 Blackfin Dependent Features


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8.5.1 Syntax

Special Characters
Assembler input is free format and may appear anywhere on the line. One instruction may extend across multiple lines or more than one instruction may appear on the same line. White space (space, tab, comments or newline) may appear anywhere between tokens. A token must not have embedded spaces. Tokens include numbers, register names, keywords, user identifiers, and also some multicharacter special symbols like "+=", "/*" or "||".
Instruction Delimiting
A semicolon must terminate every instruction. Sometimes a complete instruction will consist of more than one operation. There are two cases where this occurs. The first is when two general operations are combined. Normally a comma separates the different parts, as in
          a0= r3.h * r2.l, a1 = r3.l * r2.h ;
     

The second case occurs when a general instruction is combined with one or two memory references for joint issue. The latter portions are set off by a "||" token.

          a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++];
     

Register Names
The assembler treats register names and instruction keywords in a case insensitive manner. User identifiers are case sensitive. Thus, R3.l, R3.L, r3.l and r3.L are all equivalent input to the assembler.

Register names are reserved and may not be used as program identifiers.

Some operations (such as "Move Register") require a register pair. Register pairs are always data registers and are denoted using a colon, eg., R3:2. The larger number must be written firsts. Note that the hardware only supports odd-even pairs, eg., R7:6, R5:4, R3:2, and R1:0.

Some instructions (such as –SP (Push Multiple)) require a group of adjacent registers. Adjacent registers are denoted in the syntax by the range enclosed in parentheses and separated by a colon, eg., (R7:3). Again, the larger number appears first.

Portions of a particular register may be individually specified. This is written with a dot (".") following the register name and then a letter denoting the desired portion. For 32-bit registers, ".H" denotes the most significant ("High") portion. ".L" denotes the least-significant portion. The subdivisions of the 40-bit registers are described later.

Accumulators
The set of 40-bit registers A1 and A0 that normally contain data that is being manipulated. Each accumulator can be accessed in four ways.
one 40-bit register
The register will be referred to as A1 or A0.
one 32-bit register
The registers are designated as A1.W or A0.W.
two 16-bit registers
The registers are designated as A1.H, A1.L, A0.H or A0.L.
one 8-bit register
The registers are designated as A1.X or A0.X for the bits that extend beyond bit 31.

Data Registers
The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7) that normally contain data for manipulation. These are abbreviated as D-register or Dreg. Data registers can be accessed as 32-bit registers or as two independent 16-bit registers. The least significant 16 bits of each register is called the "low" half and is designated with ".L" following the register name. The most significant 16 bits are called the "high" half and is designated with ".H" following the name.
             R7.L, r2.h, r4.L, R0.H
     

Pointer Registers
The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP) that normally contain byte addresses of data structures. These are abbreviated as P-register or Preg.
          p2, p5, fp, sp
     

Stack Pointer SP
The stack pointer contains the 32-bit address of the last occupied byte location in the stack. The stack grows by decrementing the stack pointer.
Frame Pointer FP
The frame pointer contains the 32-bit address of the previous frame pointer in the stack. It is located at the top of a frame.
Loop Top
LT0 and LT1. These registers contain the 32-bit address of the top of a zero overhead loop.
Loop Count
LC0 and LC1. These registers contain the 32-bit counter of the zero overhead loop executions.
Loop Bottom
LB0 and LB1. These registers contain the 32-bit address of the bottom of a zero overhead loop.
Index Registers
The set of 32-bit registers (I0, I1, I2, I3) that normally contain byte addresses of data structures. Abbreviated I-register or Ireg.
Modify Registers
The set of 32-bit registers (M0, M1, M2, M3) that normally contain offset values that are added and subracted to one of the index registers. Abbreviated as Mreg.
Length Registers
The set of 32-bit registers (L0, L1, L2, L3) that normally contain the length in bytes of the circular buffer. Abbreviated as Lreg. Clear the Lreg to disable circular addressing for the corresponding Ireg.
Base Registers
The set of 32-bit registers (B0, B1, B2, B3) that normally contain the base address in bytes of the circular buffer. Abbreviated as Breg.
Floating Point
The Blackfin family has no hardware floating point but the .float directive generates ieee floating point numbers for use with software floating point libraries.
Blackfin Opcodes
For detailed information on the Blackfin machine instruction set, see the Blackfin(r) Processor Instruction Set Reference.


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8.5.2 Directives

The following directives are provided for compatibility with the VDSP assembler.

.byte2
Initializes a four byte data object.
.byte4
Initializes a two byte data object.
.db
TBD
.dd
TBD
.dw
TBD
.var
Define and initialize a 32 bit data object.


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8.6 CR16 Dependent Features


Up: CR16-Dependent

8.6.1 CR16 Operand Qualifiers

The National Semiconductor CR16 target of as has a few machine dependent operand qualifiers.

Operand expression type qualifier is an optional field in the instruction operand, to determines the type of the expression field of an operand. The @ is required. CR16 architecture uses one of the following expression qualifiers:

s
- Specifies expression operand type as small
m
- Specifies expression operand type as medium
l
- Specifies expression operand type as large
c
- Specifies the CR16 Assembler generates a relocation entry for the operand, where pc has implied bit, the expression is adjusted accordingly. The linker uses the relocation entry to update the operand address at link time.

CR16 target operand qualifiers and its size (in bits):

Immediate Operand
- s —– 4 bits
- m —– 16 bits, for movb and movw instructions.
- m —– 20 bits, movd instructions.
- l —– 32 bits
Absolute Operand
- s —– Illegal specifier for this operand.
- m —– 20 bits, movd instructions.
Displacement Operand
- s —– 8 bits
- m —– 16 bits
- l —– 24 bits

For example:

     1   movw $_myfun@c,r1
     
         This loads the address of _myfun, shifted right by 1, into r1.
     
     2   movd $_myfun@c,(r2,r1)
     
         This loads the address of _myfun, shifted right by 1, into register-pair r2-r1.
     
     3   _myfun_ptr:
         .long _myfun@c
         loadd _myfun_ptr, (r1,r0)
         jal (r1,r0)
     
         This .long directive, the address of _myfunc, shifted right by 1 at link time.


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8.7 CRIS Dependent Features


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8.7.1 Command-line Options

The CRIS version of as has these machine-dependent command-line options.

The format of the generated object files can be either ELF or a.out, specified by the command-line options --emulation=crisaout and --emulation=criself. The default is ELF (criself), unless as has been configured specifically for a.out by using the configuration name cris-axis-aout.

There are two different link-incompatible ELF object file variants for CRIS, for use in environments where symbols are expected to be prefixed by a leading _ character and for environments without such a symbol prefix. The variant used for GNU/Linux port has no symbol prefix. Which variant to produce is specified by either of the options --underscore and --no-underscore. The default is --underscore. Since symbols in CRIS a.out objects are expected to have a _ prefix, specifying --no-underscore when generating a.out objects is an error. Besides the object format difference, the effect of this option is to parse register names differently (see crisnous). The --no-underscore option makes a $ register prefix mandatory.

The option --pic must be passed to as in order to recognize the symbol syntax used for ELF (SVR4 PIC) position-independent-code (see crispic). This will also affect expansion of instructions. The expansion with --pic will use PC-relative rather than (slightly faster) absolute addresses in those expansions.

The option --march=architecture specifies the recognized instruction set and recognized register names. It also controls the architecture type of the object file. Valid values for architecture are:

v0_v10
All instructions and register names for any architecture variant in the set v0...v10 are recognized. This is the default if the target is configured as cris-*.
v10
Only instructions and register names for CRIS v10 (as found in ETRAX 100 LX) are recognized. This is the default if the target is configured as crisv10-*.
v32
Only instructions and register names for CRIS v32 (code name Guinness) are recognized. This is the default if the target is configured as crisv32-*. This value implies --no-mul-bug-abort. (A subsequent --mul-bug-abort will turn it back on.)
common_v10_v32
Only instructions with register names and addressing modes with opcodes common to the v10 and v32 are recognized.

When -N is specified, as will emit a warning when a 16-bit branch instruction is expanded into a 32-bit multiple-instruction construct (see CRIS-Expand).

Some versions of the CRIS v10, for example in the Etrax 100 LX, contain a bug that causes destabilizing memory accesses when a multiply instruction is executed with certain values in the first operand just before a cache-miss. When the --mul-bug-abort command line option is active (the default value), as will refuse to assemble a file containing a multiply instruction at a dangerous offset, one that could be the last on a cache-line, or is in a section with insufficient alignment. This placement checking does not catch any case where the multiply instruction is dangerously placed because it is located in a delay-slot. The --mul-bug-abort command line option turns off the checking.


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8.7.2 Instruction expansion

as will silently choose an instruction that fits the operand size for [register+constant] operands. For example, the offset 127 in move.d [r3+127],r4 fits in an instruction using a signed-byte offset. Similarly, move.d [r2+32767],r1 will generate an instruction using a 16-bit offset. For symbolic expressions and constants that do not fit in 16 bits including the sign bit, a 32-bit offset is generated.

For branches, as will expand from a 16-bit branch instruction into a sequence of instructions that can reach a full 32-bit address. Since this does not correspond to a single instruction, such expansions can optionally be warned about. See CRIS-Opts.

If the operand is found to fit the range, a lapc mnemonic will translate to a lapcq instruction. Use lapc.d to force the 32-bit lapc instruction.

Similarly, the addo mnemonic will translate to the shortest fitting instruction of addoq, addo.w and addo.d, when used with a operand that is a constant known at assembly time.


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8.7.3 Symbols

Some symbols are defined by the assembler. They're intended to be used in conditional assembly, for example:

      .if ..asm.arch.cris.v32
      code for CRIS v32
      .elseif ..asm.arch.cris.common_v10_v32
      code common to CRIS v32 and CRIS v10
      .elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10
      code for v10
      .else
      .error "Code needs to be added here."
      .endif

These symbols are defined in the assembler, reflecting command-line options, either when specified or the default. They are always defined, to 0 or 1.

..asm.arch.cris.any_v0_v10
This symbol is non-zero when --march=v0_v10 is specified or the default.
..asm.arch.cris.common_v10_v32
Set according to the option --march=common_v10_v32.
..asm.arch.cris.v10
Reflects the option --march=v10.
..asm.arch.cris.v32
Corresponds to --march=v10.

Speaking of symbols, when a symbol is used in code, it can have a suffix modifying its value for use in position-independent code. See CRIS-Pic.


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8.7.4 Syntax

There are different aspects of the CRIS assembly syntax.


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8.7.4.1 Special Characters

The character # is a line comment character. It starts a comment if and only if it is placed at the beginning of a line.

A ; character starts a comment anywhere on the line, causing all characters up to the end of the line to be ignored.

A @ character is handled as a line separator equivalent to a logical new-line character (except in a comment), so separate instructions can be specified on a single line.


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8.7.4.2 Symbols in position-independent code

When generating position-independent code (SVR4 PIC) for use in cris-axis-linux-gnu or crisv32-axis-linux-gnu shared libraries, symbol suffixes are used to specify what kind of run-time symbol lookup will be used, expressed in the object as different relocation types. Usually, all absolute symbol values must be located in a table, the global offset table, leaving the code position-independent; independent of values of global symbols and independent of the address of the code. The suffix modifies the value of the symbol, into for example an index into the global offset table where the real symbol value is entered, or a PC-relative value, or a value relative to the start of the global offset table. All symbol suffixes start with the character : (omitted in the list below). Every symbol use in code or a read-only section must therefore have a PIC suffix to enable a useful shared library to be created. Usually, these constructs must not be used with an additive constant offset as is usually allowed, i.e. no 4 as in symbol + 4 is allowed. This restriction is checked at link-time, not at assembly-time.

GOT
Attaching this suffix to a symbol in an instruction causes the symbol to be entered into the global offset table. The value is a 32-bit index for that symbol into the global offset table. The name of the corresponding relocation is R_CRIS_32_GOT. Example: move.d [$r0+extsym:GOT],$r9
GOT16
Same as for GOT, but the value is a 16-bit index into the global offset table. The corresponding relocation is R_CRIS_16_GOT. Example: move.d [$r0+asymbol:GOT16],$r10
PLT
This suffix is used for function symbols. It causes a procedure linkage table, an array of code stubs, to be created at the time the shared object is created or linked against, together with a global offset table entry. The value is a pc-relative offset to the corresponding stub code in the procedure linkage table. This arrangement causes the run-time symbol resolver to be called to look up and set the value of the symbol the first time the function is called (at latest; depending environment variables). It is only safe to leave the symbol unresolved this way if all references are function calls. The name of the relocation is R_CRIS_32_PLT_PCREL. Example: add.d fnname:PLT,$pc
PLTG
Like PLT, but the value is relative to the beginning of the global offset table. The relocation is R_CRIS_32_PLT_GOTREL. Example: move.d fnname:PLTG,$r3
GOTPLT
Similar to PLT, but the value of the symbol is a 32-bit index into the global offset table. This is somewhat of a mix between the effect of the GOT and the PLT suffix; the difference to GOT is that there will be a procedure linkage table entry created, and that the symbol is assumed to be a function entry and will be resolved by the run-time resolver as with PLT. The relocation is R_CRIS_32_GOTPLT. Example: jsr [$r0+fnname:GOTPLT]
GOTPLT16
A variant of GOTPLT giving a 16-bit value. Its relocation name is R_CRIS_16_GOTPLT. Example: jsr [$r0+fnname:GOTPLT16]
GOTOFF
This suffix must only be attached to a local symbol, but may be used in an expression adding an offset. The value is the address of the symbol relative to the start of the global offset table. The relocation name is R_CRIS_32_GOTREL. Example: move.d [$r0+localsym:GOTOFF],r3


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8.7.4.3 Register names

A $ character may always prefix a general or special register name in an instruction operand but is mandatory when the option --no-underscore is specified or when the .syntax register_prefix directive is in effect (see crisnous). Register names are case-insensitive.


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8.7.4.4 Assembler Directives

There are a few CRIS-specific pseudo-directives in addition to the generic ones. See Pseudo Ops. Constants emitted by pseudo-directives are in little-endian order for CRIS. There is no support for floating-point-specific directives for CRIS.

.dword EXPRESSIONS
The .dword directive is a synonym for .int, expecting zero or more EXPRESSIONS, separated by commas. For each expression, a 32-bit little-endian constant is emitted.
.syntax ARGUMENT
The .syntax directive takes as ARGUMENT one of the following case-sensitive choices.
no_register_prefix
The .syntax no_register_prefix directive makes a $ character prefix on all registers optional. It overrides a previous setting, including the corresponding effect of the option --no-underscore. If this directive is used when ordinary symbols do not have a _ character prefix, care must be taken to avoid ambiguities whether an operand is a register or a symbol; using symbols with names the same as general or special registers then invoke undefined behavior.
register_prefix
This directive makes a $ character prefix on all registers mandatory. It overrides a previous setting, including the corresponding effect of the option --underscore.
leading_underscore
This is an assertion directive, emitting an error if the --no-underscore option is in effect.
no_leading_underscore
This is the opposite of the .syntax leading_underscore directive and emits an error if the option --underscore is in effect.

.arch ARGUMENT
This is an assertion directive, giving an error if the specified ARGUMENT is not the same as the specified or default value for the --march=architecture option (see march-option).


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8.8 D10V Dependent Features


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8.8.1 D10V Options

The Mitsubishi D10V version of as has a few machine dependent options.

-O
The D10V can often execute two sub-instructions in parallel. When this option is used, as will attempt to optimize its output by detecting when instructions can be executed in parallel.
--nowarnswap
To optimize execution performance, as will sometimes swap the order of instructions. Normally this generates a warning. When this option is used, no warning will be generated when instructions are swapped.
--gstabs-packing
--no-gstabs-packing
as packs adjacent short instructions into a single packed instruction. --no-gstabs-packing turns instruction packing off if --gstabs is specified as well; --gstabs-packing (the default) turns instruction packing on even when --gstabs is specified.


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8.8.2 Syntax

The D10V syntax is based on the syntax in Mitsubishi's D10V architecture manual. The differences are detailed below.


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8.8.2.1 Size Modifiers

The D10V version of as uses the instruction names in the D10V Architecture Manual. However, the names in the manual are sometimes ambiguous. There are instruction names that can assemble to a short or long form opcode. How does the assembler pick the correct form? as will always pick the smallest form if it can. When dealing with a symbol that is not defined yet when a line is being assembled, it will always use the long form. If you need to force the assembler to use either the short or long form of the instruction, you can append either .s (short) or .l (long) to it. For example, if you are writing an assembly program and you want to do a branch to a symbol that is defined later in your program, you can write bra.s foo. Objdump and GDB will always append .s or .l to instructions which have both short and long forms.


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8.8.2.2 Sub-Instructions

The D10V assembler takes as input a series of instructions, either one-per-line, or in the special two-per-line format described in the next section. Some of these instructions will be short-form or sub-instructions. These sub-instructions can be packed into a single instruction. The assembler will do this automatically. It will also detect when it should not pack instructions. For example, when a label is defined, the next instruction will never be packaged with the previous one. Whenever a branch and link instruction is called, it will not be packaged with the next instruction so the return address will be valid. Nops are automatically inserted when necessary.

If you do not want the assembler automatically making these decisions, you can control the packaging and execution type (parallel or sequential) with the special execution symbols described in the next section.


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8.8.2.3 Special Characters

; and # are the line comment characters. Sub-instructions may be executed in order, in reverse-order, or in parallel. Instructions listed in the standard one-per-line format will be executed sequentially. To specify the executing order, use the following symbols:

->
Sequential with instruction on the left first.
<-
Sequential with instruction on the right first.
||
Parallel
The D10V syntax allows either one instruction per line, one instruction per line with the execution symbol, or two instructions per line. For example
abs a1 -> abs r0
Execute these sequentially. The instruction on the right is in the right container and is executed second.
abs r0 <- abs a1
Execute these reverse-sequentially. The instruction on the right is in the right container, and is executed first.
ld2w r2,@r8+ || mac a0,r0,r7
Execute these in parallel.
ld2w r2,@r8+ ||
mac a0,r0,r7
Two-line format. Execute these in parallel.
ld2w r2,@r8+
mac a0,r0,r7
Two-line format. Execute these sequentially. Assembler will put them in the proper containers.
ld2w r2,@r8+ ->
mac a0,r0,r7
Two-line format. Execute these sequentially. Same as above but second instruction will always go into right container.
Since $ has no special meaning, you may use it in symbol names.


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8.8.2.4 Register Names

You can use the predefined symbols r0 through r15 to refer to the D10V registers. You can also use sp as an alias for r15. The accumulators are a0 and a1. There are special register-pair names that may optionally be used in opcodes that require even-numbered registers. Register names are not case sensitive.

Register Pairs

r0-r1
r2-r3
r4-r5
r6-r7
r8-r9
r10-r11
r12-r13
r14-r15

The D10V also has predefined symbols for these control registers and status bits:

psw
Processor Status Word
bpsw
Backup Processor Status Word
pc
Program Counter
bpc
Backup Program Counter
rpt_c
Repeat Count
rpt_s
Repeat Start address
rpt_e
Repeat End address
mod_s
Modulo Start address
mod_e
Modulo End address
iba
Instruction Break Address
f0
Flag 0
f1
Flag 1
c
Carry flag


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8.8.2.5 Addressing Modes

as understands the following addressing modes for the D10V. Rn in the following refers to any of the numbered registers, but not the control registers.

Rn
Register direct
@Rn
Register indirect
@Rn+
Register indirect with post-increment
@Rn-
Register indirect with post-decrement
@-SP
Register indirect with pre-decrement
@(disp, Rn)
Register indirect with displacement
addr
PC relative address (for branch or rep).
#imm
Immediate data (the # is optional and ignored)


Previous: D10V-Addressing, Up: D10V-Syntax
8.8.2.6 @WORD Modifier

Any symbol followed by @word will be replaced by the symbol's value shifted right by 2. This is used in situations such as loading a register with the address of a function (or any other code fragment). For example, if you want to load a register with the location of the function main then jump to that function, you could do it as follows:

     ldi     r2, main@word
     jmp     r2


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8.8.3 Floating Point

The D10V has no hardware floating point, but the .float and .double directives generates ieee floating-point numbers for compatibility with other development tools.


Previous: D10V-Float, Up: D10V-Dependent

8.8.4 Opcodes

For detailed information on the D10V machine instruction set, see D10V Architecture: A VLIW Microprocessor for Multimedia Applications (Mitsubishi Electric Corp.). as implements all the standard D10V opcodes. The only changes are those described in the section on size modifiers


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8.9 D30V Dependent Features


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8.9.1 D30V Options

The Mitsubishi D30V version of as has a few machine dependent options.

-O
The D30V can often execute two sub-instructions in parallel. When this option is used, as will attempt to optimize its output by detecting when instructions can be executed in parallel.
-n
When this option is used, as will issue a warning every time it adds a nop instruction.
-N
When this option is used, as will issue a warning if it needs to insert a nop after a 32-bit multiply before a load or 16-bit multiply instruction.


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8.9.2 Syntax

The D30V syntax is based on the syntax in Mitsubishi's D30V architecture manual. The differences are detailed below.


Next: , Up: D30V-Syntax
8.9.2.1 Size Modifiers

The D30V version of as uses the instruction names in the D30V Architecture Manual. However, the names in the manual are sometimes ambiguous. There are instruction names that can assemble to a short or long form opcode. How does the assembler pick the correct form? as will always pick the smallest form if it can. When dealing with a symbol that is not defined yet when a line is being assembled, it will always use the long form. If you need to force the assembler to use either the short or long form of the instruction, you can append either .s (short) or .l (long) to it. For example, if you are writing an assembly program and you want to do a branch to a symbol that is defined later in your program, you can write bra.s foo. Objdump and GDB will always append .s or .l to instructions which have both short and long forms.


Next: , Previous: D30V-Size, Up: D30V-Syntax
8.9.2.2 Sub-Instructions

The D30V assembler takes as input a series of instructions, either one-per-line, or in the special two-per-line format described in the next section. Some of these instructions will be short-form or sub-instructions. These sub-instructions can be packed into a single instruction. The assembler will do this automatically. It will also detect when it should not pack instructions. For example, when a label is defined, the next instruction will never be packaged with the previous one. Whenever a branch and link instruction is called, it will not be packaged with the next instruction so the return address will be valid. Nops are automatically inserted when necessary.

If you do not want the assembler automatically making these decisions, you can control the packaging and execution type (parallel or sequential) with the special execution symbols described in the next section.


Next: , Previous: D30V-Subs, Up: D30V-Syntax
8.9.2.3 Special Characters

; and # are the line comment characters. Sub-instructions may be executed in order, in reverse-order, or in parallel. Instructions listed in the standard one-per-line format will be executed sequentially unless you use the -O option.

To specify the executing order, use the following symbols:

->
Sequential with instruction on the left first.
<-
Sequential with instruction on the right first.
||
Parallel

The D30V syntax allows either one instruction per line, one instruction per line with the execution symbol, or two instructions per line. For example

abs r2,r3 -> abs r4,r5
Execute these sequentially. The instruction on the right is in the right container and is executed second.
abs r2,r3 <- abs r4,r5
Execute these reverse-sequentially. The instruction on the right is in the right container, and is executed first.
abs r2,r3 || abs r4,r5
Execute these in parallel.
ldw r2,@(r3,r4) ||
mulx r6,r8,r9
Two-line format. Execute these in parallel.
mulx a0,r8,r9
stw r2,@(r3,r4)
Two-line format. Execute these sequentially unless -O option is used. If the -O option is used, the assembler will determine if the instructions could be done in parallel (the above two instructions can be done in parallel), and if so, emit them as parallel instructions. The assembler will put them in the proper containers. In the above example, the assembler will put the stw instruction in left container and the mulx instruction in the right container.
stw r2,@(r3,r4) ->
mulx a0,r8,r9
Two-line format. Execute the stw instruction followed by the mulx instruction sequentially. The first instruction goes in the left container and the second instruction goes into right container. The assembler will give an error if the machine ordering constraints are violated.
stw r2,@(r3,r4) <-
mulx a0,r8,r9
Same as previous example, except that the mulx instruction is executed before the stw instruction.

Since $ has no special meaning, you may use it in symbol names.


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8.9.2.4 Guarded Execution

as supports the full range of guarded execution directives for each instruction. Just append the directive after the instruction proper. The directives are:

/tx
Execute the instruction if flag f0 is true.
/fx
Execute the instruction if flag f0 is false.
/xt
Execute the instruction if flag f1 is true.
/xf
Execute the instruction if flag f1 is false.
/tt
Execute the instruction if both flags f0 and f1 are true.
/tf
Execute the instruction if flag f0 is true and flag f1 is false.


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8.9.2.5 Register Names

You can use the predefined symbols r0 through r63 to refer to the D30V registers. You can also use sp as an alias for r63 and link as an alias for r62. The accumulators are a0 and a1.

The D30V also has predefined symbols for these control registers and status bits:

psw
Processor Status Word
bpsw
Backup Processor Status Word
pc
Program Counter
bpc
Backup Program Counter
rpt_c
Repeat Count
rpt_s
Repeat Start address
rpt_e
Repeat End address
mod_s
Modulo Start address
mod_e
Modulo End address
iba
Instruction Break Address
f0
Flag 0
f1
Flag 1
f2
Flag 2
f3
Flag 3
f4
Flag 4
f5
Flag 5
f6
Flag 6
f7
Flag 7
s
Same as flag 4 (saturation flag)
v
Same as flag 5 (overflow flag)
va
Same as flag 6 (sticky overflow flag)
c
Same as flag 7 (carry/borrow flag)
b
Same as flag 7 (carry/borrow flag)


Previous: D30V-Regs, Up: D30V-Syntax
8.9.2.6 Addressing Modes

as understands the following addressing modes for the D30V. Rn in the following refers to any of the numbered registers, but not the control registers.

Rn
Register direct
@Rn
Register indirect
@Rn+
Register indirect with post-increment
@Rn-
Register indirect with post-decrement
@-SP
Register indirect with pre-decrement
@(disp, Rn)
Register indirect with displacement
addr
PC relative address (for branch or rep).
#imm
Immediate data (the # is optional and ignored)


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8.9.3 Floating Point

The D30V has no hardware floating point, but the .float and .double directives generates ieee floating-point numbers for compatibility with other development tools.


Previous: D30V-Float, Up: D30V-Dependent

8.9.4 Opcodes

For detailed information on the D30V machine instruction set, see D30V Architecture: A VLIW Microprocessor for Multimedia Applications (Mitsubishi Electric Corp.). as implements all the standard D30V opcodes. The only changes are those described in the section on size modifiers


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8.10 H8/300 Dependent Features


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8.10.1 Options

as has no additional command-line options for the Renesas (formerly Hitachi) H8/300 family.


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8.10.2 Syntax


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8.10.2.1 Special Characters

; is the line comment character.

$ can be used instead of a newline to separate statements. Therefore you may not use $ in symbol names on the H8/300.


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8.10.2.2 Register Names

You can use predefined symbols of the form rnh and rnl to refer to the H8/300 registers as sixteen 8-bit general-purpose registers. n is a digit from 0 to 7); for instance, both r0h and r7l are valid register names.

You can also use the eight predefined symbols rn to refer to the H8/300 registers as 16-bit registers (you must use this form for addressing).

On the H8/300H, you can also use the eight predefined symbols ern (er0 ... er7) to refer to the 32-bit general purpose registers.

The two control registers are called pc (program counter; a 16-bit register, except on the H8/300H where it is 24 bits) and ccr (condition code register; an 8-bit register). r7 is used as the stack pointer, and can also be called sp.


Previous: H8/300-Regs, Up: H8/300 Syntax
8.10.2.3 Addressing Modes

as understands the following addressing modes for the H8/300:

rn
Register direct
@rn
Register indirect
@(d, rn)
@(d:16, rn)
@(d:24, rn)
Register indirect: 16-bit or 24-bit displacement d from register n. (24-bit displacements are only meaningful on the H8/300H.)
@rn+
Register indirect with post-increment
@-rn
Register indirect with pre-decrement
@aa
@aa:8
@aa:16
@aa:24
Absolute address aa. (The address size :24 only makes sense on the H8/300H.)
#xx
#xx:8
#xx:16
#xx:32
Immediate data xx. You may specify the :8, :16, or :32 for clarity, if you wish; but as neither requires this nor uses it—the data size required is taken from context.
@@aa
@@aa:8
Memory indirect. You may specify the :8 for clarity, if you wish; but as neither requires this nor uses it.


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8.10.3 Floating Point

The H8/300 family has no hardware floating point, but the .float directive generates ieee floating-point numbers for compatibility with other development tools.


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8.10.4 H8/300 Machine Directives

as has the following machine-dependent directives for the H8/300:

.h8300h
Recognize and emit additional instructions for the H8/300H variant, and also make .int emit 32-bit numbers rather than the usual (16-bit) for the H8/300 family.
.h8300s
Recognize and emit additional instructions for the H8S variant, and also make .int emit 32-bit numbers rather than the usual (16-bit) for the H8/300 family.
.h8300hn
Recognize and emit additional instructions for the H8/300H variant in normal mode, and also make .int emit 32-bit numbers rather than the usual (16-bit) for the H8/300 family.
.h8300sn
Recognize and emit additional instructions for the H8S variant in normal mode, and also make .int emit 32-bit numbers rather than the usual (16-bit) for the H8/300 family.

On the H8/300 family (including the H8/300H) .word directives generate 16-bit numbers.


Previous: H8/300 Directives, Up: H8/300-Dependent

8.10.5 Opcodes

For detailed information on the H8/300 machine instruction set, see H8/300 Series Programming Manual. For information specific to the H8/300H, see H8/300H Series Programming Manual (Renesas).

as implements all the standard H8/300 opcodes. No additional pseudo-instructions are needed on this family.

Four H8/300 instructions (add, cmp, mov, sub) are defined with variants using the suffixes .b, .w, and .l to specify the size of a memory operand. as supports these suffixes, but does not require them; since one of the operands is always a register, as can deduce the correct size.

For example, since r0 refers to a 16-bit register,

     mov    r0,@foo

is equivalent to
mov.w r0,@foo

If you use the size suffixes, as issues a warning when the suffix and the register size do not match.


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8.11 HPPA Dependent Features


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8.11.1 Notes

As a back end for gnu cc as has been throughly tested and should work extremely well. We have tested it only minimally on hand written assembly code and no one has tested it much on the assembly output from the HP compilers.

The format of the debugging sections has changed since the original as port (version 1.3X) was released; therefore, you must rebuild all HPPA objects and libraries with the new assembler so that you can debug the final executable.

The HPPA as port generates a small subset of the relocations available in the SOM and ELF object file formats. Additional relocation support will be added as it becomes necessary.


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8.11.2 Options

as has no machine-dependent command-line options for the HPPA.


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8.11.3 Syntax

The assembler syntax closely follows the HPPA instruction set reference manual; assembler directives and general syntax closely follow the HPPA assembly language reference manual, with a few noteworthy differences.

First, a colon may immediately follow a label definition. This is simply for compatibility with how most assembly language programmers write code.

Some obscure expression parsing problems may affect hand written code which uses the spop instructions, or code which makes significant use of the ! line separator.

as is much less forgiving about missing arguments and other similar oversights than the HP assembler. as notifies you of missing arguments as syntax errors; this is regarded as a feature, not a bug.

Finally, as allows you to use an external symbol without explicitly importing the symbol. Warning: in the future this will be an error for HPPA targets.

Special characters for HPPA targets include:

; is the line comment character.

! can be used instead of a newline to separate statements.

Since $ has no special meaning, you may use it in symbol names.


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8.11.4 Floating Point

The HPPA family uses ieee floating-point numbers.


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8.11.5 HPPA Assembler Directives

as for the HPPA supports many additional directives for compatibility with the native assembler. This section describes them only briefly. For detailed information on HPPA-specific assembler directives, see HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001).

as does not support the following assembler directives described in the HP manual:

     .endm           .liston
     .enter          .locct
     .leave          .macro
     .listoff

Beyond those implemented for compatibility, as supports one additional assembler directive for the HPPA: .param. It conveys register argument locations for static functions. Its syntax closely follows the .export directive.

These are the additional directives in as for the HPPA:

.block n
.blockz n
Reserve n bytes of storage, and initialize them to zero.
.call
Mark the beginning of a procedure call. Only the special case with no arguments is allowed.
.callinfo [ param=value, ... ] [ flag, ... ]
Specify a number of parameters and flags that define the environment for a procedure.

param may be any of frame (frame size), entry_gr (end of general register range), entry_fr (end of float register range), entry_sr (end of space register range).

The values for flag are calls or caller (proc has subroutines), no_calls (proc does not call subroutines), save_rp (preserve return pointer), save_sp (proc preserves stack pointer), no_unwind (do not unwind this proc), hpux_int (proc is interrupt routine).

.code
Assemble into the standard section called $TEXT$, subsection $CODE$.
.copyright "string"
In the SOM object format, insert string into the object code, marked as a copyright string.
.copyright "string"
In the ELF object format, insert string into the object code, marked as a version string.
.enter
Not yet supported; the assembler rejects programs containing this directive.
.entry
Mark the beginning of a procedure.
.exit
Mark the end of a procedure.
.export name [ ,typ ] [ ,param=r ]
Make a procedure name available to callers. typ, if present, must be one of absolute, code (ELF only, not SOM), data, entry, data, entry, millicode, plabel, pri_prog, or sec_prog.

param, if present, provides either relocation information for the procedure arguments and result, or a privilege level. param may be argwn (where n ranges from 0 to 3, and indicates one of four one-word arguments); rtnval (the procedure's result); or priv_lev (privilege level). For arguments or the result, r specifies how to relocate, and must be one of no (not relocatable), gr (argument is in general register), fr (in floating point register), or fu (upper half of float register). For priv_lev, r is an integer.

.half n
Define a two-byte integer constant n; synonym for the portable as directive .short.
.import name [ ,typ ]
Converse of .export; make a procedure available to call. The arguments use the same conventions as the first two arguments for .export.
.label name
Define name as a label for the current assembly location.
.leave
Not yet supported; the assembler rejects programs containing this directive.
.origin lc
Advance location counter to lc. Synonym for the as portable directive .org.
.param name [ ,typ ] [ ,param=r ]
Similar to .export, but used for static procedures.
.proc
Use preceding the first statement of a procedure.
.procend
Use following the last statement of a procedure.
label .reg expr
Synonym for .equ; define label with the absolute expression expr as its value.
.space secname [ ,params ]
Switch to section secname, creating a new section by that name if necessary. You may only use params when creating a new section, not when switching to an existing one. secname may identify a section by number rather than by name.

If specified, the list params declares attributes of the section, identified by keywords. The keywords recognized are spnum=exp (identify this section by the number exp, an absolute expression), sort=exp (order sections according to this sort key when linking; exp is an absolute expression), unloadable (section contains no loadable data), notdefined (this section defined elsewhere), and private (data in this section not available to other programs).

.spnum secnam
Allocate four bytes of storage, and initialize them with the section number of the section named secnam. (You can define the section number with the HPPA .space directive.)


.string "str"
Copy the characters in the string str to the object file. See Strings, for information on escape sequences you can use in as strings.

Warning! The HPPA version of .string differs from the usual as definition: it does not write a zero byte after copying str.

.stringz "str"
Like .string, but appends a zero byte after copying str to object file.
.subspa name [ ,params ]
.nsubspa name [ ,params ]
Similar to .space, but selects a subsection name within the current section. You may only specify params when you create a subsection (in the first instance of .subspa for this name).

If specified, the list params declares attributes of the subsection, identified by keywords. The keywords recognized are quad=expr (“quadrant” for this subsection), align=expr (alignment for beginning of this subsection; a power of two), access=expr (value for “access rights” field), sort=expr (sorting order for this subspace in link), code_only (subsection contains only code), unloadable (subsection cannot be loaded into memory), comdat (subsection is comdat), common (subsection is common block), dup_comm (subsection may have duplicate names), or zero (subsection is all zeros, do not write in object file).

.nsubspa always creates a new subspace with the given name, even if one with the same name already exists.

comdat, common and dup_comm can be used to implement various flavors of one-only support when using the SOM linker. The SOM linker only supports specific combinations of these flags. The details are not documented. A brief description is provided here.

comdat provides a form of linkonce support. It is useful for both code and data subspaces. A comdat subspace has a key symbol marked by the is_comdat flag or ST_COMDAT. Only the first subspace for any given key is selected. The key symbol becomes universal in shared links. This is similar to the behavior of secondary_def symbols.

common provides Fortran named common support. It is only useful for data subspaces. Symbols with the flag is_common retain this flag in shared links. Referencing a is_common symbol in a shared library from outside the library doesn't work. Thus, is_common symbols must be output whenever they are needed.

common and dup_comm together provide Cobol common support. The subspaces in this case must all be the same length. Otherwise, this support is similar to the Fortran common support.

dup_comm by itself provides a type of one-only support for code. Only the first dup_comm subspace is selected. There is a rather complex algorithm to compare subspaces. Code symbols marked with the dup_common flag are hidden. This support was intended for "C++ duplicate inlines".

A simplified technique is used to mark the flags of symbols based on the flags of their subspace. A symbol with the scope SS_UNIVERSAL and type ST_ENTRY, ST_CODE or ST_DATA is marked with the corresponding settings of comdat, common and dup_comm from the subspace, respectively. This avoids having to introduce additional directives to mark these symbols. The HP assembler sets is_common from common. However, it doesn't set the dup_common from dup_comm. It doesn't have comdat support.

.version "str"
Write str as version identifier in object code.


Previous: HPPA Directives, Up: HPPA-Dependent

8.11.6 Opcodes

For detailed information on the HPPA machine instruction set, see PA-RISC Architecture and Instruction Set Reference Manual (HP 09740-90039).


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8.12 ESA/390 Dependent Features


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8.12.1 Notes

The ESA/390 as port is currently intended to be a back-end for the gnu cc compiler. It is not HLASM compatible, although it does support a subset of some of the HLASM directives. The only supported binary file format is ELF; none of the usual MVS/VM/OE/USS object file formats, such as ESD or XSD, are supported.

When used with the gnu cc compiler, the ESA/390 as will produce correct, fully relocated, functional binaries, and has been used to compile and execute large projects. However, many aspects should still be considered experimental; these include shared library support, dynamically loadable objects, and any relocation other than the 31-bit relocation.


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8.12.2 Options

as has no machine-dependent command-line options for the ESA/390.


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8.12.3 Syntax

The opcode/operand syntax follows the ESA/390 Principles of Operation manual; assembler directives and general syntax are loosely based on the prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives are not supported for the most part, with the exception of those described herein.

A leading dot in front of directives is optional, and the case of directives is ignored; thus for example, .using and USING have the same effect.

A colon may immediately follow a label definition. This is simply for compatibility with how most assembly language programmers write code.

# is the line comment character.

; can be used instead of a newline to separate statements.

Since $ has no special meaning, you may use it in symbol names.

Registers can be given the symbolic names r0..r15, fp0, fp2, fp4, fp6. By using thesse symbolic names, as can detect simple syntax errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base for r3 and rpgt or r.pgt for r4.

* is the current location counter. Unlike . it is always relative to the last USING directive. Note that this means that expressions cannot use multiplication, as any occurrence of * will be interpreted as a location counter.

All labels are relative to the last USING. Thus, branches to a label always imply the use of base+displacement.

Many of the usual forms of address constants / address literals are supported. Thus,

     	.using	*,r3
     	L	r15,=A(some_routine)
     	LM	r6,r7,=V(some_longlong_extern)
     	A	r1,=F'12'
     	AH	r0,=H'42'
     	ME	r6,=E'3.1416'
     	MD	r6,=D'3.14159265358979'
     	O	r6,=XL4'cacad0d0'
     	.ltorg

should all behave as expected: that is, an entry in the literal pool will be created (or reused if it already exists), and the instruction operands will be the displacement into the literal pool using the current base register (as last declared with the .using directive).


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8.12.4 Floating Point

The assembler generates only ieee floating-point numbers. The older floating point formats are not supported.


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8.12.5 ESA/390 Assembler Directives

as for the ESA/390 supports all of the standard ELF/SVR4 assembler directives that are documented in the main part of this documentation. Several additional directives are supported in order to implement the ESA/390 addressing model. The most important of these are .using and .ltorg

These are the additional directives in as for the ESA/390:

.dc
A small subset of the usual DC directive is supported.
.drop regno
Stop using regno as the base register. The regno must have been previously declared with a .using directive in the same section as the current section.
.ebcdic string
Emit the EBCDIC equivalent of the indicated string. The emitted string will be null terminated. Note that the directives .string etc. emit ascii strings by default.
EQU
The standard HLASM-style EQU directive is not supported; however, the standard as directive .equ can be used to the same effect.
.ltorg
Dump the literal pool accumulated so far; begin a new literal pool. The literal pool will be written in the current section; in order to generate correct assembly, a .using must have been previously specified in the same section.
.using expr,regno
Use regno as the base register for all subsequent RX, RS, and SS form instructions. The expr will be evaluated to obtain the base address; usually, expr will merely be *.

This assembler allows two .using directives to be simultaneously outstanding, one in the .text section, and one in another section (typically, the .data section). This feature allows dynamically loaded objects to be implemented in a relatively straightforward way. A .using directive must always be specified in the .text section; this will specify the base register that will be used for branches in the .text section. A second .using may be specified in another section; this will specify the base register that is used for non-label address literals. When a second .using is specified, then the subsequent .ltorg must be put in the same section; otherwise an error will result.

Thus, for example, the following code uses r3 to address branch targets and r4 to address the literal pool, which has been written to the .data section. The is, the constants =A(some_routine), =H'42' and =E'3.1416' will all appear in the .data section.

          .data
          	.using  LITPOOL,r4
          .text
          	BASR	r3,0
          	.using	*,r3
                  B       START
          	.long	LITPOOL
          START:
          	L	r4,4(,r3)
          	L	r15,=A(some_routine)
          	LTR	r15,r15
          	BNE	LABEL
          	AH	r0,=H'42'
          LABEL:
          	ME	r6,=E'3.1416'
          .data
          LITPOOL:
          	.ltorg
     

Note that this dual-.using directive semantics extends and is not compatible with HLASM semantics. Note that this assembler directive does not support the full range of HLASM semantics.


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8.12.6 Opcodes

For detailed information on the ESA/390 machine instruction set, see ESA/390 Principles of Operation (IBM Publication Number DZ9AR004).


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8.13 80386 Dependent Features

The i386 version as supports both the original Intel 386 architecture in both 16 and 32-bit mode as well as AMD x86-64 architecture extending the Intel architecture to 64-bits.


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8.13.1 Options

The i386 version of as has a few machine dependent options:

--32 | --64
Select the word size, either 32 bits or 64 bits. Selecting 32-bit implies Intel i386 architecture, while 64-bit implies AMD x86-64 architecture.

These options are only available with the ELF object file format, and require that the necessary BFD support has been included (on a 32-bit platform you have to add –enable-64-bit-bfd to configure enable 64-bit usage and use x86-64 as target platform).

-n
By default, x86 GAS replaces multiple nop instructions used for alignment within code sections with multi-byte nop instructions such as leal 0(%esi,1),%esi. This switch disables the optimization.


--divide
On SVR4-derived platforms, the character / is treated as a comment character, which means that it cannot be used in expressions. The --divide option turns / into a normal character. This does not disable / at the beginning of a line starting a comment, or affect using # for starting a comment.


-march=CPU
This option specifies an instruction set architecture for generating instructions. The following architectures are recognized: i8086, i186, i286, i386, i486, i586, i686, pentium, pentiumpro, pentiumii, pentiumiii, pentium4, prescott, nocona, core, core2, k6, k6_2, athlon, sledgehammer, opteron, k8, generic32 and generic64.

This option only affects instructions generated by the assembler. The .arch directive will take precedent.